diff options
| author | Keith Packard <keithp@keithp.com> | 2017-12-12 15:31:27 -0800 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2017-12-12 15:31:27 -0800 |
| commit | 28dbe9a04b16f79db255baecbf0cd486c510ef58 (patch) | |
| tree | 854d8962d5266d1a15c20d976c3da88933a96d49 /src | |
| parent | db352bd0723e8d640bb034bc14e5ad193f0afe1d (diff) | |
altos/stm: Align 'data' to 8 bytes, just like textram
The textram section must be aligned to 8 bytes to keep the linker
happy. However, if that section contains no data, the declaration will
set the __data_start__ value to that alignment, but the data section
itself would start on a 4-byte alignment, potentially 4 bytes lower
than the value indicated by __data_start__. This completely scrambles
initialized memory as the startup code will copy the data segment to
__data_start__, 4 bytes off of the actual data segment start.
Fix this by forcing the data segment to also be aligned to 8 bytes.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/micropeak-v2.0/micropeak.ld | 10 | ||||
| -rw-r--r-- | src/stm/altos-loader.ld | 3 | ||||
| -rw-r--r-- | src/stmf0/altos-loader.ld | 5 |
3 files changed, 10 insertions, 8 deletions
diff --git a/src/micropeak-v2.0/micropeak.ld b/src/micropeak-v2.0/micropeak.ld index 77717e16..baeae5b8 100644 --- a/src/micropeak-v2.0/micropeak.ld +++ b/src/micropeak-v2.0/micropeak.ld @@ -19,8 +19,8 @@ MEMORY { rom (rx) : ORIGIN = 0x08001000, LENGTH = 20K flash(rx) : ORIGIN = 0x08006000, LENGTH = 8K - ram (!w) : ORIGIN = 0x20000000, LENGTH = 6k - 128 - stack (!w) : ORIGIN = 0x20000000 + 6k - 128, LENGTH = 128 + ram (!w) : ORIGIN = 0x20000000, LENGTH = 6k - 512 + stack (!w) : ORIGIN = 0x20000000 + 6k - 512, LENGTH = 512 } INCLUDE registers.ld @@ -94,11 +94,11 @@ SECTIONS { *(.ramtext) } >ram AT>rom - /* Data -- relocated to RAM, but written to ROM + /* Data -- relocated to RAM, but written to ROM, + * also aligned to 8 bytes to agree with textram */ - .data : { + .data BLOCK(8): { *(.data) /* initialized data */ - . = ALIGN(4); __data_end__ = .; } >ram AT>rom diff --git a/src/stm/altos-loader.ld b/src/stm/altos-loader.ld index a4a7dc43..806b4842 100644 --- a/src/stm/altos-loader.ld +++ b/src/stm/altos-loader.ld @@ -72,8 +72,9 @@ SECTIONS { } >ram AT>rom /* Data -- relocated to RAM, but written to ROM + * Also aligned to 8 bytes to agree with textram */ - .data : { + .data BLOCK(8): { *(.data) /* initialized data */ __data_end__ = .; } >ram AT>rom diff --git a/src/stmf0/altos-loader.ld b/src/stmf0/altos-loader.ld index c458116b..05887d0e 100644 --- a/src/stmf0/altos-loader.ld +++ b/src/stmf0/altos-loader.ld @@ -72,9 +72,10 @@ SECTIONS { __text_ram_end = .; } >ram AT>rom - /* Data -- relocated to RAM, but written to ROM + /* Data -- relocated to RAM, but written to ROM. + * also aligned to 8 bytes in case textram is empty */ - .data : { + .data BLOCK(8): { *(.data) /* initialized data */ __data_end__ = .; } >ram AT>rom |