summaryrefslogtreecommitdiff
path: root/src/stm/stm32l.h
diff options
context:
space:
mode:
authorKeith Packard <keithp@keithp.com>2012-04-09 22:17:33 -0700
committerKeith Packard <keithp@keithp.com>2012-04-09 22:17:33 -0700
commit51aef5d4fc29986353ad887f4a67ed2fe35f8c8e (patch)
tree537602d5a0ed6fdae7e4ce8830f3c24a4a87aca5 /src/stm/stm32l.h
parent1dcfbb05531767e67df45c2799a2fe533834fb71 (diff)
altos: Make STM clock configuration per-product. Fix 32MHz CPU speed
This moves all of the STM clock configuration into ao_pins.h so that each product can configure it separately. While doing this, I discovered that the flash memory mode (64-bit, prefetch, latency 1) wasn't actually getting set, which is why the CPU refused to work at 32MHz. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm/stm32l.h')
-rw-r--r--src/stm/stm32l.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 39dd710d..b922b6bc 100644
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -303,6 +303,9 @@ struct stm_rcc {
extern struct stm_rcc stm_rcc;
+/* Nominal high speed internal oscillator frequency is 16MHz */
+#define STM_HSI_FREQ 16000000
+
#define STM_RCC_CR_RTCPRE (29)
#define STM_RCC_CR_RTCPRE_HSE_DIV_2 0
#define STM_RCC_CR_RTCPRE_HSE_DIV_4 1