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authorKeith Packard <keithp@keithp.com>2019-02-21 19:26:41 -0800
committerKeith Packard <keithp@keithp.com>2019-02-21 19:40:08 -0800
commit3310b22e28d953a6569cd50e83f91c25577424a5 (patch)
treee9e25251aa002114512048da1bf44013a300a738 /src/lpc
parenteaf2ee0f498b519d64e1664a2b8c66c52ac1497c (diff)
altos: Fix ISR declarations to make them non-weak
In my zeal to eliminate warnings, I added declarations of all ISR functions to a shared header file. However, I managed to include the 'weak' declaration, which meant that the intended ISR functions were as weak as the 'default' ISR functions. This left all interrupts non-functional, which doesn't make for a happy program. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/lpc')
-rw-r--r--src/lpc/ao_interrupt.c4
-rw-r--r--src/lpc/lpc.h86
2 files changed, 46 insertions, 44 deletions
diff --git a/src/lpc/ao_interrupt.c b/src/lpc/ao_interrupt.c
index 77be7fab..8d71f43f 100644
--- a/src/lpc/ao_interrupt.c
+++ b/src/lpc/ao_interrupt.c
@@ -40,12 +40,12 @@ extern char __interrupt_rom__, __interrupt_start__, __interrupt_end__;
/* Interrupt functions */
-static void lpc_halt_isr(void)
+void lpc_halt_isr(void)
{
ao_panic(AO_PANIC_CRASH);
}
-static void lpc_ignore_isr(void)
+void lpc_ignore_isr(void)
{
}
diff --git a/src/lpc/lpc.h b/src/lpc/lpc.h
index 1d02e2e2..56b85230 100644
--- a/src/lpc/lpc.h
+++ b/src/lpc/lpc.h
@@ -1348,47 +1348,49 @@ extern struct lpc_ct32b lpc_ct32b0, lpc_ct32b1;
#define LPC_CT32B_EMR_EMC_TOGGLE 3
#define isr_decl(name) \
- void __attribute__ ((weak)) lpc_ ## name ## _isr(void);
-
-isr_decl(nmi)
-isr_decl(hardfault)
-isr_decl(memmanage)
-isr_decl(busfault)
-isr_decl(usagefault)
-isr_decl(svc)
-isr_decl(debugmon)
-isr_decl(pendsv)
-isr_decl(systick)
-
-isr_decl(pin_int0) /* IRQ0 */
-isr_decl(pin_int1)
-isr_decl(pin_int2)
-isr_decl(pin_int3)
-isr_decl(pin_int4) /* IRQ4 */
-isr_decl(pin_int5)
-isr_decl(pin_int6)
-isr_decl(pin_int7)
-
-isr_decl(gint0) /* IRQ8 */
-isr_decl(gint1)
-isr_decl(ssp1)
-isr_decl(i2c)
-
-isr_decl(ct16b0) /* IRQ16 */
-isr_decl(ct16b1)
-isr_decl(ct32b0)
-isr_decl(ct32b1)
-isr_decl(ssp0) /* IRQ20 */
-isr_decl(usart)
-isr_decl(usb_irq)
-isr_decl(usb_fiq)
-
-isr_decl(adc) /* IRQ24 */
-isr_decl(wwdt)
-isr_decl(bod)
-isr_decl(flash)
-
-isr_decl(usb_wakeup)
-
+ void lpc_ ## name ## _isr(void)
+
+isr_decl(halt);
+isr_decl(ignore);
+
+isr_decl(nmi);
+isr_decl(hardfault);
+isr_decl(memmanage);
+isr_decl(busfault);
+isr_decl(usagefault);
+isr_decl(svc);
+isr_decl(debugmon);
+isr_decl(pendsv);
+isr_decl(systick);
+
+isr_decl(pin_int0); /* IRQ0 */
+isr_decl(pin_int1);
+isr_decl(pin_int2);
+isr_decl(pin_int3);
+isr_decl(pin_int4); /* IRQ4 */
+isr_decl(pin_int5);
+isr_decl(pin_int6);
+isr_decl(pin_int7);
+
+isr_decl(gint0); /* IRQ8 */
+isr_decl(gint1);
+isr_decl(ssp1);
+isr_decl(i2c);
+
+isr_decl(ct16b0); /* IRQ16 */
+isr_decl(ct16b1);
+isr_decl(ct32b0);
+isr_decl(ct32b1);
+isr_decl(ssp0); /* IRQ20 */
+isr_decl(usart);
+isr_decl(usb_irq);
+isr_decl(usb_fiq);
+
+isr_decl(adc); /* IRQ24 */
+isr_decl(wwdt);
+isr_decl(bod);
+isr_decl(flash);
+
+isr_decl(usb_wakeup);
#endif /* _LPC_H_ */