diff options
| author | Keith Packard <keithp@keithp.com> | 2015-02-14 23:18:38 -0800 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2015-02-14 23:18:38 -0800 |
| commit | 135abf0e7c5ceb5738a0b5f68fe2be4b7abdae5e (patch) | |
| tree | cd5b8e2be9c9838de42cd86576ceb76758f6abbb /src/drivers/ao_cc1200.h | |
| parent | 9c75faf1ec51eb2f9a8dc9402653490143a784d9 (diff) | |
altos/cc1200: Adjust bit-sync configuration
The default bit timing adjustment mechanism allows for only a 0.2%
deviation from the programmed bit timing. I found one TeleMini device
which is beyond that tolerance as it was built with an older crystal
with more error.
Switch to the more expensive synchronization mechanism which allows up
to 2% timing error, but requires a multi-byte preamble (which we
have). This fixes packet mode nicely.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/drivers/ao_cc1200.h')
| -rw-r--r-- | src/drivers/ao_cc1200.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/drivers/ao_cc1200.h b/src/drivers/ao_cc1200.h index b04775fd..b2b63cde 100644 --- a/src/drivers/ao_cc1200.h +++ b/src/drivers/ao_cc1200.h @@ -438,6 +438,38 @@ #define CC1200_IF_MIX_CFG (CC1200_EXTENDED_BIT | 0x00) #define CC1200_FREQOFF_CFG (CC1200_EXTENDED_BIT | 0x01) #define CC1200_TOC_CFG (CC1200_EXTENDED_BIT | 0x02) + +#define CC1200_TOC_CFG_TOC_LIMIT 6 +#define CC1200_TOC_CFG_TOC_LIMIT_0_2 0 +#define CC1200_TOC_CFG_TOC_LIMIT_2 1 +#define CC1200_TOC_CFG_TOC_LIMIT_12 3 + +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN 3 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8 0 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_16 1 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_32 2 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_64 3 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_128 4 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_256 5 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8_16 0 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_6_16 1 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_2_16 2 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16 3 +#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16_SYNC 4 + +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN 0 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_8 0 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_16 1 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_32 2 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_64 3 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_128 4 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_256 5 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_FREEZE 0 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_6_32 1 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_2_32 2 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32 3 +#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32_SYNC 4 + #define CC1200_MARC_SPARE (CC1200_EXTENDED_BIT | 0x03) #define CC1200_ECG_CFG (CC1200_EXTENDED_BIT | 0x04) #define CC1200_MDMCFG2 (CC1200_EXTENDED_BIT | 0x05) |