summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKeith Packard <keithp@keithp.com>2013-01-13 20:50:10 -0800
committerKeith Packard <keithp@keithp.com>2013-01-13 20:54:14 -0800
commita866431e9a063830b407f749ff97a730831e5e4e (patch)
treeffd9a2167354fc4c2495327af7b7415cf2bc5657
parent8d885616e2e522b8aea5e7d5398f16d330a0cffa (diff)
altos: Crank fast SPI on STM to 8MHz
With the GPIO pins set to 10MHz now, we can run SPI at the maximum possible speed (8MHz). Signed-off-by: Keith Packard <keithp@keithp.com>
-rw-r--r--src/stm/ao_arch_funcs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index 87bbe73e..d1779307 100644
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -23,7 +23,7 @@
/* PCLK is set to 16MHz (HCLK 32MHz, APB prescaler 2) */
-#define AO_SPI_SPEED_8MHz STM_SPI_CR1_BR_PCLK_2 /* This doesn't appear to work */
+#define AO_SPI_SPEED_8MHz STM_SPI_CR1_BR_PCLK_2
#define AO_SPI_SPEED_4MHz STM_SPI_CR1_BR_PCLK_4
#define AO_SPI_SPEED_2MHz STM_SPI_CR1_BR_PCLK_8
#define AO_SPI_SPEED_1MHz STM_SPI_CR1_BR_PCLK_16
@@ -32,7 +32,7 @@
#define AO_SPI_SPEED_125kHz STM_SPI_CR1_BR_PCLK_128
#define AO_SPI_SPEED_62500Hz STM_SPI_CR1_BR_PCLK_256
-#define AO_SPI_SPEED_FAST AO_SPI_SPEED_4MHz
+#define AO_SPI_SPEED_FAST AO_SPI_SPEED_8MHz
/* Companion bus wants something no faster than 200kHz */