diff options
| author | Bdale Garbee <bdale@gag.com> | 2017-05-03 11:47:33 -0600 |
|---|---|---|
| committer | Bdale Garbee <bdale@gag.com> | 2017-05-03 11:47:33 -0600 |
| commit | 643f7508233f492a86f541b4f4fb20531b306ae0 (patch) | |
| tree | 4acf7dfefa9662a8eefdfde8635afb8cecd3b396 | |
| parent | a6e1010f7519c5d1243e8950df6f022576152a87 (diff) | |
altos/telebt-v4.0 Set CPU clock to 48Mhz instead of 96Mhz
| -rw-r--r-- | src/telebt-v4.0/ao_pins.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/telebt-v4.0/ao_pins.h b/src/telebt-v4.0/ao_pins.h index 749f2439..e5139b3e 100644 --- a/src/telebt-v4.0/ao_pins.h +++ b/src/telebt-v4.0/ao_pins.h @@ -20,9 +20,10 @@ #define _AO_PINS_H_ #define AO_HSE 32000000 -#define AO_RCC_CFGR_PLLMUL STM_RCC_CFGR_PLLMUL_3 -#define AO_PLLMUL 3 -#define AO_PLLDIV 1 +#define AO_RCC_CFGR_PLLMUL STM_RCC_CFGR_PLLMUL_3 +#define AO_RCC_CFGR2_PLLDIV STM_RCC_CFGR2_PREDIV_2 +#define AO_PLLMUL 3 +#define AO_PLLDIV 2 /* HCLK = 48MHz */ #define AO_AHB_PRESCALER 1 @@ -32,8 +33,6 @@ #define AO_APB_PRESCALER 1 #define AO_RCC_CFGR_PPRE_DIV STM_RCC_CFGR_PPRE_DIV_1 -#define AO_RCC_CFGR2_PLLDIV STM_RCC_CFGR2_PREDIV_1 - #define HAS_USB 1 #define AO_USB_DIRECTIO 0 #define AO_PA11_PA12_RMP 0 |