/* * Copyright © 2011 Keith Packard * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. */ #include #include #define F_CPU 16000000UL // 16 MHz #include #define LEDOUT PORTB7 #define LEDPORT PORTB #define LEDDDR DDRB #define LEDDDRPIN DD7 ISR(TIMER1_COMPA_vect) { static int x; if (++x > 50) { x = 0; LEDPORT ^= (1 << LEDOUT); } } static void timer_init(void) { TCCR1A = ((0 << WGM11) | /* CTC mode, OCR1A */ (0 << WGM10)); /* CTC mode, OCR1A */ TCCR1B = ((0 << ICNC1) | /* no input capture noise canceler */ (0 << ICES1) | /* input capture on falling edge (don't care) */ (0 << WGM13) | /* CTC mode, OCR1A */ (1 << WGM12) | /* CTC mode, OCR1A */ (3 << CS10)); /* clk/64 from prescaler */ OCR1A = 2500; /* 16MHz clock */ // OCR1A = 1250; /* 8MHz clock */ TIMSK1 = (1 << OCIE1A); /* Interrupt on compare match */ } static void clock_init(void) { /* disable RC clock */ CLKSEL0 &= ~(1 << RCE); /* Disable PLL */ PLLCSR &= ~(1 << PLLE); /* Enable external clock */ CLKSEL0 |= (1 << EXTE); /* wait for external clock to be ready */ while ((CLKSTA & (1 << EXTON)) == 0) ; /* select external clock */ CLKSEL0 |= (1 << CLKS); /* Disable the clock prescaler */ cli(); CLKPR = (1 << CLKPCE); CLKPR = 0; sei(); /* Set up the PLL to use the crystal */ /* Use primary system clock as PLL source */ PLLFRQ = ((0 << PINMUX) | /* Use primary clock */ (0 << PLLUSB) | /* No divide by 2 for USB */ (0 << PLLTM0) | /* Disable high speed timer */ (0x4 << PDIV0)); /* 48MHz PLL clock */ /* Set the frequency of the crystal */ PLLCSR |= (1 << PINDIV); /* For 16MHz crystal on Teensy board */ // PLLCSR &= ~(1 << PINDIV); /* For 8MHz crystal on TeleScience board */ /* Enable the PLL */ PLLCSR |= (1 << PLLE); while (!(PLLCSR & (1 << PLOCK))) ; } int main(void) { clock_init(); timer_init(); LEDDDR |= (1 << LEDDDRPIN); for (;;) { } #if 0 while (1) { LEDPORT |= (1 << LEDOUT); _delay_ms(1000); LEDPORT &= ~(1 << LEDOUT); _delay_ms(1000); } #endif }