From b119e19604aa557a40e848c60d98a67b5f259bbd Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Tue, 23 Oct 2012 22:17:49 -0700 Subject: altos: profiling on STM32L Add sample-based profiling, using a 1kHz timer Signed-off-by: Keith Packard --- src/stm/stm32l.h | 134 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 132 insertions(+), 2 deletions(-) (limited to 'src/stm/stm32l.h') diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 25f5af07..e950d09b 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -254,8 +254,138 @@ struct stm_tim { }; extern struct stm_tim stm_tim9; -extern struct stm_tim stm_tim10; -extern struct stm_tim stm_tim11; + +struct stm_tim1011 { + vuint32_t cr1; + uint32_t unused_4; + vuint32_t smcr; + vuint32_t dier; + vuint32_t sr; + vuint32_t egr; + vuint32_t ccmr1; + uint32_t unused_1c; + vuint32_t ccer; + vuint32_t cnt; + vuint32_t psc; + vuint32_t arr; + uint32_t unused_30; + vuint32_t ccr1; + uint32_t unused_38; + uint32_t unused_3c; + uint32_t unused_40; + uint32_t unused_44; + uint32_t unused_48; + uint32_t unused_4c; + vuint32_t or; +}; + +extern struct stm_tim1011 stm_tim10; +extern struct stm_tim1011 stm_tim11; + +#define STM_TIM1011_CR1_CKD 8 +#define STM_TIM1011_CR1_CKD_1 0 +#define STM_TIM1011_CR1_CKD_2 1 +#define STM_TIM1011_CR1_CKD_4 2 +#define STM_TIM1011_CR1_CKD_MASK 3 +#define STM_TIM1011_CR1_ARPE 7 +#define STM_TIM1011_CR1_URS 2 +#define STM_TIM1011_CR1_UDIS 1 +#define STM_TIM1011_CR1_CEN 0 + +#define STM_TIM1011_SMCR_ETP 15 +#define STM_TIM1011_SMCR_ECE 14 +#define STM_TIM1011_SMCR_ETPS 12 +#define STM_TIM1011_SMCR_ETPS_OFF 0 +#define STM_TIM1011_SMCR_ETPS_2 1 +#define STM_TIM1011_SMCR_ETPS_4 2 +#define STM_TIM1011_SMCR_ETPS_8 3 +#define STM_TIM1011_SMCR_ETPS_MASK 3 +#define STM_TIM1011_SMCR_ETF 8 +#define STM_TIM1011_SMCR_ETF_NONE 0 +#define STM_TIM1011_SMCR_ETF_CK_INT_2 1 +#define STM_TIM1011_SMCR_ETF_CK_INT_4 2 +#define STM_TIM1011_SMCR_ETF_CK_INT_8 3 +#define STM_TIM1011_SMCR_ETF_DTS_2_6 4 +#define STM_TIM1011_SMCR_ETF_DTS_2_8 5 +#define STM_TIM1011_SMCR_ETF_DTS_4_6 6 +#define STM_TIM1011_SMCR_ETF_DTS_4_8 7 +#define STM_TIM1011_SMCR_ETF_DTS_8_6 8 +#define STM_TIM1011_SMCR_ETF_DTS_8_8 9 +#define STM_TIM1011_SMCR_ETF_DTS_16_5 10 +#define STM_TIM1011_SMCR_ETF_DTS_16_6 11 +#define STM_TIM1011_SMCR_ETF_DTS_16_8 12 +#define STM_TIM1011_SMCR_ETF_DTS_32_5 13 +#define STM_TIM1011_SMCR_ETF_DTS_32_6 14 +#define STM_TIM1011_SMCR_ETF_DTS_32_8 15 +#define STM_TIM1011_SMCR_ETF_MASK 15 + +#define STM_TIM1011_DIER_CC1E 1 +#define STM_TIM1011_DIER_UIE 0 + +#define STM_TIM1011_SR_CC1OF 9 +#define STM_TIM1011_SR_CC1IF 1 +#define STM_TIM1011_SR_UIF 0 + +#define STM_TIM1011_EGR_CC1G 1 +#define STM_TIM1011_EGR_UG 0 + +#define STM_TIM1011_CCMR1_OC1CE 7 +#define STM_TIM1011_CCMR1_OC1M 4 +#define STM_TIM1011_CCMR1_OC1M_FROZEN 0 +#define STM_TIM1011_CCMR1_OC1M_SET_1_ACTIVE_ON_MATCH 1 +#define STM_TIM1011_CCMR1_OC1M_SET_1_INACTIVE_ON_MATCH 2 +#define STM_TIM1011_CCMR1_OC1M_TOGGLE 3 +#define STM_TIM1011_CCMR1_OC1M_FORCE_INACTIVE 4 +#define STM_TIM1011_CCMR1_OC1M_FORCE_ACTIVE 5 +#define STM_TIM1011_CCMR1_OC1M_PWM_MODE_1 6 +#define STM_TIM1011_CCMR1_OC1M_PWM_MODE_2 7 +#define STM_TIM1011_CCMR1_OC1M_MASK 7 +#define STM_TIM1011_CCMR1_OC1PE 3 +#define STM_TIM1011_CCMR1_OC1FE 2 +#define STM_TIM1011_CCMR1_CC1S 0 +#define STM_TIM1011_CCMR1_CC1S_OUTPUT 0 +#define STM_TIM1011_CCMR1_CC1S_INPUT_TI1 1 +#define STM_TIM1011_CCMR1_CC1S_INPUT_TI2 2 +#define STM_TIM1011_CCMR1_CC1S_INPUT_TRC 3 +#define STM_TIM1011_CCMR1_CC1S_MASK 3 + +#define STM_TIM1011_CCMR1_IC1F_NONE 0 +#define STM_TIM1011_CCMR1_IC1F_CK_INT_2 1 +#define STM_TIM1011_CCMR1_IC1F_CK_INT_4 2 +#define STM_TIM1011_CCMR1_IC1F_CK_INT_8 3 +#define STM_TIM1011_CCMR1_IC1F_DTS_2_6 4 +#define STM_TIM1011_CCMR1_IC1F_DTS_2_8 5 +#define STM_TIM1011_CCMR1_IC1F_DTS_4_6 6 +#define STM_TIM1011_CCMR1_IC1F_DTS_4_8 7 +#define STM_TIM1011_CCMR1_IC1F_DTS_8_6 8 +#define STM_TIM1011_CCMR1_IC1F_DTS_8_8 9 +#define STM_TIM1011_CCMR1_IC1F_DTS_16_5 10 +#define STM_TIM1011_CCMR1_IC1F_DTS_16_6 11 +#define STM_TIM1011_CCMR1_IC1F_DTS_16_8 12 +#define STM_TIM1011_CCMR1_IC1F_DTS_32_5 13 +#define STM_TIM1011_CCMR1_IC1F_DTS_32_6 14 +#define STM_TIM1011_CCMR1_IC1F_DTS_32_8 15 +#define STM_TIM1011_CCMR1_IC1F_MASK 15 +#define STM_TIM1011_CCMR1_IC1PSC 2 +#define STM_TIM1011_CCMR1_IC1PSC_1 0 +#define STM_TIM1011_CCMR1_IC1PSC_2 1 +#define STM_TIM1011_CCMR1_IC1PSC_4 2 +#define STM_TIM1011_CCMR1_IC1PSC_8 3 +#define STM_TIM1011_CCMR1_IC1PSC_MASK 3 +#define STM_TIM1011_CCMR1_CC1S 0 + +#define STM_TIM1011_CCER_CC1NP 3 +#define STM_TIM1011_CCER_CC1P 1 +#define STM_TIM1011_CCER_CC1E 0 + +#define STM_TIM1011_OR_TI1_RMP_RI 3 +#define STM_TIM1011_ETR_RMP 2 +#define STM_TIM1011_TI1_RMP 0 +#define STM_TIM1011_TI1_RMP_GPIO 0 +#define STM_TIM1011_TI1_RMP_LSI 1 +#define STM_TIM1011_TI1_RMP_LSE 2 +#define STM_TIM1011_TI1_RMP_RTC 3 +#define STM_TIM1011_TI1_RMP_MASK 3 /* Flash interface */ -- cgit v1.2.3 From 4b13d3c659240e5a8347b1ba7ab0bf1d8355eba3 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Wed, 24 Oct 2012 22:46:55 -0700 Subject: altos: Add stack-guard code. Uses STM MPU to trap stack overflow. This marks the lowest portion of the stack as inaccessible to the CPU, causing the processor to fault when it reaches it. The fault then generates a panic message so that the user can know what happened. Signed-off-by: Keith Packard --- src/core/ao.h | 1 + src/core/ao_task.c | 6 ++ src/megametrum-v0.1/Makefile | 10 ++- src/megametrum-v0.1/ao_megametrum.c | 7 ++ src/stm-bringup/Makefile | 2 +- src/stm-bringup/ao.h | 18 +++++ src/stm/ao_interrupt.c | 3 +- src/stm/ao_mpu.h | 29 +++++++ src/stm/ao_mpu_stm.c | 149 ++++++++++++++++++++++++++++++++++++ src/stm/registers.ld | 2 + src/stm/stm32l.h | 64 ++++++++++++++++ 11 files changed, 286 insertions(+), 5 deletions(-) create mode 100644 src/stm-bringup/ao.h create mode 100644 src/stm/ao_mpu.h create mode 100644 src/stm/ao_mpu_stm.c (limited to 'src/stm/stm32l.h') diff --git a/src/core/ao.h b/src/core/ao.h index 2b375cfd..87e69e19 100644 --- a/src/core/ao.h +++ b/src/core/ao.h @@ -64,6 +64,7 @@ #define AO_PANIC_BT 11 /* Communications with bluetooth device failed */ #define AO_PANIC_STACK 12 /* Stack overflow */ #define AO_PANIC_SPI 13 /* SPI communication failure */ +#define AO_PANIC_CRASH 14 /* Processor crashed */ #define AO_PANIC_SELF_TEST_CC1120 0x40 | 1 /* Self test failure */ #define AO_PANIC_SELF_TEST_HMC5883 0x40 | 2 /* Self test failure */ #define AO_PANIC_SELF_TEST_MPU6000 0x40 | 3 /* Self test failure */ diff --git a/src/core/ao_task.c b/src/core/ao_task.c index c2b1b270..df70b906 100644 --- a/src/core/ao_task.c +++ b/src/core/ao_task.c @@ -20,6 +20,9 @@ #if HAS_SAMPLE_PROFILE #include #endif +#if HAS_STACK_GUARD +#include +#endif #define AO_NO_TASK_INDEX 0xff @@ -127,6 +130,9 @@ ao_yield(void) ao_arch_naked_define ao_cur_task->start = ao_sample_profile_timer_value(); #endif } +#if HAS_STACK_GUARD + ao_mpu_stack_guard(ao_cur_task->stack); +#endif #if AO_CHECK_STACK cli(); in_yield = 0; diff --git a/src/megametrum-v0.1/Makefile b/src/megametrum-v0.1/Makefile index b100fafc..487a643f 100644 --- a/src/megametrum-v0.1/Makefile +++ b/src/megametrum-v0.1/Makefile @@ -25,11 +25,13 @@ INC = \ ao_task.h \ ao_whiten.h \ ao_sample_profile.h \ + ao_mpu.h \ stm32l.h # # Common AltOS sources # +# ao_hmc5883.c #PROFILE=ao_profile.c #PROFILE_DEF=-DAO_PROFILE=1 @@ -38,7 +40,8 @@ SAMPLE_PROFILE=ao_sample_profile.c \ ao_sample_profile_timer.c SAMPLE_PROFILE_DEF=-DHAS_SAMPLE_PROFILE=1 -# ao_hmc5883.c +STACK_GUARD=ao_mpu_stm.c +STACK_GUARD_DEF=-DHAS_STACK_GUARD=1 ALTOS_SRC = \ ao_interrupt.c \ @@ -87,13 +90,14 @@ ALTOS_SRC = \ ao_companion.c \ ao_pyro.c \ $(PROFILE) \ - $(SAMPLE_PROFILE) + $(SAMPLE_PROFILE) \ + $(STACK_GUARD) PRODUCT=MegaMetrum-v0.1 PRODUCT_DEF=-DMEGAMETRUM IDPRODUCT=0x0023 -CFLAGS = $(PRODUCT_DEF) $(STM_CFLAGS) $(PROFILE_DEF) $(SAMPLE_PROFILE_DEF) -Os -g +CFLAGS = $(PRODUCT_DEF) $(STM_CFLAGS) $(PROFILE_DEF) $(SAMPLE_PROFILE_DEF) $(STACK_GUARD_DEF) -Os -g PROGNAME=megametrum-v0.1 PROG=$(PROGNAME)-$(VERSION).elf diff --git a/src/megametrum-v0.1/ao_megametrum.c b/src/megametrum-v0.1/ao_megametrum.c index 114f144f..43c2292d 100644 --- a/src/megametrum-v0.1/ao_megametrum.c +++ b/src/megametrum-v0.1/ao_megametrum.c @@ -28,12 +28,19 @@ #include #endif #include +#if HAS_STACK_GUARD +#include +#endif int main(void) { ao_clock_init(); +#if HAS_STACK_GUARD + ao_mpu_init(); +#endif + ao_serial_init(); ao_led_init(LEDS_AVAILABLE); ao_led_on(AO_LED_GREEN); diff --git a/src/stm-bringup/Makefile b/src/stm-bringup/Makefile index d45e836d..5cc94bd9 100644 --- a/src/stm-bringup/Makefile +++ b/src/stm-bringup/Makefile @@ -12,7 +12,7 @@ PDCLIB=/home/keithp/sat C_LIB=$(PDCLIB)/lib/pdclib.a C_INC=-I$(PDCLIB)/include -DEF_CFLAGS=-g -std=gnu99 -Os -mlittle-endian -mthumb -ffreestanding -nostdlib -I../../src/stm $(C_INC) +DEF_CFLAGS=-g -std=gnu99 -Os -mlittle-endian -mthumb -ffreestanding -nostdlib -I. -I../../src/stm $(C_INC) # to run from SRAM LD_FLAGS_RAM=-L../stm -Wl,-Taltos-ram.ld diff --git a/src/stm-bringup/ao.h b/src/stm-bringup/ao.h new file mode 100644 index 00000000..27204fae --- /dev/null +++ b/src/stm-bringup/ao.h @@ -0,0 +1,18 @@ +/* + * Copyright © 2012 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + */ + +#define ao_panic(n) for(;;); diff --git a/src/stm/ao_interrupt.c b/src/stm/ao_interrupt.c index 6b4a9700..a423d8b1 100644 --- a/src/stm/ao_interrupt.c +++ b/src/stm/ao_interrupt.c @@ -15,6 +15,7 @@ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. */ +#include #include "stm32l.h" #include @@ -28,7 +29,7 @@ extern char __bss_start__, __bss_end__; void stm_halt_isr(void) { - for(;;); + ao_panic(AO_PANIC_CRASH); } void stm_ignore_isr(void) diff --git a/src/stm/ao_mpu.h b/src/stm/ao_mpu.h new file mode 100644 index 00000000..cc6132a5 --- /dev/null +++ b/src/stm/ao_mpu.h @@ -0,0 +1,29 @@ +/* + * Copyright © 2012 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + */ + +#ifndef _AO_MPU_H_ +#define _AO_MPU_H_ + +extern uint32_t ao_mpu_dregion; + +void +ao_mpu_stack_guard(void *stack); + +void +ao_mpu_init(void); + +#endif /* _AO_MPU_H_ */ diff --git a/src/stm/ao_mpu_stm.c b/src/stm/ao_mpu_stm.c new file mode 100644 index 00000000..969d7446 --- /dev/null +++ b/src/stm/ao_mpu_stm.c @@ -0,0 +1,149 @@ +/* + * Copyright © 2012 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + */ + +#include +#include + +static uint32_t stm_mpu_dregion; + +void +ao_mpu_init(void) +{ + uint32_t region; + + /* Check to see how many regions we have */ + stm_mpu_dregion = (stm_mpu.typer >> STM_MPU_TYPER_DREGION) & STM_MPU_TYPER_DREGION_MASK; + + /* No MPU at all */ + if (stm_mpu_dregion == 0) + return; + + /* Disable MPU */ + stm_mpu.cr = ((0 << STM_MPU_CR_PRIVDEFENA) | + (0 << STM_MPU_CR_HFNMIENA) | + (0 << STM_MPU_CR_ENABLE)); + + /* Disable all regions */ + for (region = 0; region < stm_mpu_dregion; region++) { + /* Set the base address and RNR value */ + stm_mpu.rbar = ((0 & (STM_MPU_RBAR_ADDR_MASK << STM_MPU_RBAR_ADDR)) | + (1 << STM_MPU_RBAR_VALID) | + (region << STM_MPU_RBAR_REGION)); + + /* Disable this region */ + stm_mpu.rasr = 0; + } + + region = 0; + + /* Flash */ + /* 0x00000000 - 0x1fffffff */ + stm_mpu.rbar = (0x0000000 | + (1 << STM_MPU_RBAR_VALID) | + (region << STM_MPU_RBAR_REGION)); + + stm_mpu.rasr = ((0 << STM_MPU_RASR_XN) | + (STM_MPU_RASR_AP_RO_RO << STM_MPU_RASR_AP) | + (5 << STM_MPU_RASR_TEX) | + (0 << STM_MPU_RASR_C) | + (1 << STM_MPU_RASR_B) | + (0 << STM_MPU_RASR_S) | + (0 << STM_MPU_RASR_SRD) | + (28 << STM_MPU_RASR_SIZE) | + (1 << STM_MPU_RASR_ENABLE)); + region++; + + /* Ram */ + /* 0x20000000 - 0x3fffffff */ + stm_mpu.rbar = (0x20000000 | + (1 << STM_MPU_RBAR_VALID) | + (region << STM_MPU_RBAR_REGION)); + + stm_mpu.rasr = ((0 << STM_MPU_RASR_XN) | + (STM_MPU_RASR_AP_RW_RW << STM_MPU_RASR_AP) | + (5 << STM_MPU_RASR_TEX) | + (0 << STM_MPU_RASR_C) | + (1 << STM_MPU_RASR_B) | + (0 << STM_MPU_RASR_S) | + (0 << STM_MPU_RASR_SRD) | + (28 << STM_MPU_RASR_SIZE) | + (1 << STM_MPU_RASR_ENABLE)); + region++; + + /* Peripherals */ + + /* 0x4000000 - 0x7ffffff */ + stm_mpu.rbar = (0x40000000 | + (1 << STM_MPU_RBAR_VALID) | + (region << STM_MPU_RBAR_REGION)); + + stm_mpu.rasr = ((1 << STM_MPU_RASR_XN) | + (STM_MPU_RASR_AP_RW_RW << STM_MPU_RASR_AP) | + (2 << STM_MPU_RASR_TEX) | + (0 << STM_MPU_RASR_C) | + (0 << STM_MPU_RASR_B) | + (0 << STM_MPU_RASR_S) | + (0 << STM_MPU_RASR_SRD) | + (29 << STM_MPU_RASR_SIZE) | + (1 << STM_MPU_RASR_ENABLE)); + region++; + + /* 0x8000000 - 0xffffffff */ + stm_mpu.rbar = (0x80000000 | + (1 << STM_MPU_RBAR_VALID) | + (region << STM_MPU_RBAR_REGION)); + + stm_mpu.rasr = ((1 << STM_MPU_RASR_XN) | + (STM_MPU_RASR_AP_RW_RW << STM_MPU_RASR_AP) | + (2 << STM_MPU_RASR_TEX) | + (0 << STM_MPU_RASR_C) | + (0 << STM_MPU_RASR_B) | + (0 << STM_MPU_RASR_S) | + (0 << STM_MPU_RASR_SRD) | + (30 << STM_MPU_RASR_SIZE) | + (1 << STM_MPU_RASR_ENABLE)); + region++; + + /* Enable MPU */ + stm_mpu.cr = ((0 << STM_MPU_CR_PRIVDEFENA) | + (0 << STM_MPU_CR_HFNMIENA) | + (1 << STM_MPU_CR_ENABLE)); +} + +/* + * Protect the base of the stack from CPU access + */ + +void +ao_mpu_stack_guard(void *base) +{ + uintptr_t addr = (uintptr_t) base; + + /* Round up to cover the lowest possible 32-byte region */ + addr = (addr + ~(STM_MPU_RBAR_ADDR_MASK << STM_MPU_RBAR_ADDR)) & (STM_MPU_RBAR_ADDR_MASK << STM_MPU_RBAR_ADDR); + + stm_mpu.rbar = addr | (1 << STM_MPU_RBAR_VALID) | (7 << STM_MPU_RBAR_REGION); + stm_mpu.rasr = ((1 << STM_MPU_RASR_XN) | + (STM_MPU_RASR_AP_NONE_NONE << STM_MPU_RASR_AP) | + (5 << STM_MPU_RASR_TEX) | + (0 << STM_MPU_RASR_C) | + (1 << STM_MPU_RASR_B) | + (0 << STM_MPU_RASR_S) | + (0 << STM_MPU_RASR_SRD) | + (4 << STM_MPU_RASR_SIZE) | + (1 << STM_MPU_RASR_ENABLE)); +} diff --git a/src/stm/registers.ld b/src/stm/registers.ld index fd61e486..f8b224a2 100644 --- a/src/stm/registers.ld +++ b/src/stm/registers.ld @@ -46,5 +46,7 @@ stm_tim2 = 0x40000000; stm_nvic = 0xe000e100; +stm_mpu = 0xe000ed90; + /* calibration data in system memory */ stm_temp_cal = 0x1ff80078; diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index e950d09b..d953aee4 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -901,6 +901,63 @@ stm_nvic_get_priority(int irq) { return (stm_nvic.ipr[IRQ_PRIO_REG(irq)] >> IRQ_PRIO_BIT(irq)) & IRQ_PRIO_MASK(0); } +struct stm_mpu { + vuint32_t typer; + vuint32_t cr; + vuint32_t rnr; + vuint32_t rbar; + + vuint32_t rasr; + vuint32_t rbar_a1; + vuint32_t rasr_a1; + vuint32_t rbar_a2; + vuint32_t rasr_a2; + vuint32_t rbar_a3; + vuint32_t rasr_a3; +}; + +extern struct stm_mpu stm_mpu; + +#define STM_MPU_TYPER_IREGION 16 +#define STM_MPU_TYPER_IREGION_MASK 0xff +#define STM_MPU_TYPER_DREGION 8 +#define STM_MPU_TYPER_DREGION_MASK 0xff +#define STM_MPU_TYPER_SEPARATE 0 + +#define STM_MPU_CR_PRIVDEFENA 2 +#define STM_MPU_CR_HFNMIENA 1 +#define STM_MPU_CR_ENABLE 0 + +#define STM_MPU_RNR_REGION 0 +#define STM_MPU_RNR_REGION_MASK 0xff + +#define STM_MPU_RBAR_ADDR 5 +#define STM_MPU_RBAR_ADDR_MASK 0x7ffffff + +#define STM_MPU_RBAR_VALID 4 +#define STM_MPU_RBAR_REGION 0 +#define STM_MPU_RBAR_REGION_MASK 0xf + +#define STM_MPU_RASR_XN 28 +#define STM_MPU_RASR_AP 24 +#define STM_MPU_RASR_AP_NONE_NONE 0 +#define STM_MPU_RASR_AP_RW_NONE 1 +#define STM_MPU_RASR_AP_RW_RO 2 +#define STM_MPU_RASR_AP_RW_RW 3 +#define STM_MPU_RASR_AP_RO_NONE 5 +#define STM_MPU_RASR_AP_RO_RO 6 +#define STM_MPU_RASR_AP_MASK 7 +#define STM_MPU_RASR_TEX 19 +#define STM_MPU_RASR_TEX_MASK 7 +#define STM_MPU_RASR_S 18 +#define STM_MPU_RASR_C 17 +#define STM_MPU_RASR_B 16 +#define STM_MPU_RASR_SRD 8 +#define STM_MPU_RASR_SRD_MASK 0xff +#define STM_MPU_RASR_SIZE 1 +#define STM_MPU_RASR_SIZE_MASK 0x1f +#define STM_MPU_RASR_ENABLE 0 + #define isr(name) void stm_ ## name ## _isr(void); isr(nmi) @@ -1568,6 +1625,13 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4; #define STM_TIM234_SR_CC1IF 1 #define STM_TIM234_SR_UIF 0 +#define STM_TIM234_EGR_TG 6 +#define STM_TIM234_EGR_CC4G 4 +#define STM_TIM234_EGR_CC3G 3 +#define STM_TIM234_EGR_CC2G 2 +#define STM_TIM234_EGR_CC1G 1 +#define STM_TIM234_EGR_UG 0 + #define STM_TIM234_CCMR1_OC2CE 15 #define STM_TIM234_CCMR1_OC2M 12 #define STM_TIM234_CCMR1_OC2M_FROZEN 0 -- cgit v1.2.3 From 9b978cd467f9128f3069765dd8fbf8abad3459a4 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Thu, 25 Oct 2012 13:38:13 -0700 Subject: altos: Clean up stm arch macros a bit. Turn a bunch of the macros into inline functions. Clean up the reboot method to use the stm_scb structure. Signed-off-by: Keith Packard --- src/stm/ao_arch.h | 112 ++---------------------------------------------- src/stm/ao_arch_funcs.h | 99 ++++++++++++++++++++++++++++++++++++++++++ src/stm/registers.ld | 2 + src/stm/stm32l.h | 30 +++++++++++++ 4 files changed, 134 insertions(+), 109 deletions(-) (limited to 'src/stm/stm32l.h') diff --git a/src/stm/ao_arch.h b/src/stm/ao_arch.h index 0c3cfc91..e270199e 100644 --- a/src/stm/ao_arch.h +++ b/src/stm/ao_arch.h @@ -46,9 +46,9 @@ #define __interrupt(n) #define __at(n) -#define CORTEX_M3_AIRCR ((uint32_t *) 0xe000ed0c) - -#define ao_arch_reboot() (*((uint32_t *) 0xe000ed0c) = 0x05fa0004) +#define ao_arch_reboot() \ + (stm_scb.aircr = ((STM_SCB_AIRCR_VECTKEY_KEY << STM_SCB_AIRCR_VECTKEY) | \ + (1 << STM_SCB_AIRCR_SYSRESETREQ))) #define ao_arch_nop() asm("nop") @@ -77,118 +77,12 @@ extern const uint16_t ao_romconfig_check; extern const uint16_t ao_serial_number; extern const uint32_t ao_radio_cal; -#define ARM_PUSH32(stack, val) (*(--(stack)) = (val)) - #define ao_arch_task_members\ uint32_t *sp; /* saved stack pointer */ #define ao_arch_block_interrupts() asm("cpsid i") #define ao_arch_release_interrupts() asm("cpsie i") -#define cli() ao_arch_block_interrupts() -#define sei() ao_arch_release_interrupts() - -static uint32_t -ao_arch_irqsave(void) { - uint32_t primask; - asm("mrs %0,primask" : "=&r" (primask)); - ao_arch_block_interrupts(); - return primask; -} - -static void -ao_arch_irqrestore(uint32_t primask) { - asm("msr primask,%0" : : "r" (primask)); -} - -static void -ao_arch_memory_barrier() { - asm volatile("" ::: "memory"); -} - -#define ao_arch_init_stack(task, start) do { \ - uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE); \ - uint32_t a = (uint32_t) start; \ - int i; \ - \ - /* Return address (goes into LR) */ \ - ARM_PUSH32(sp, a); \ - \ - /* Clear register values r0-r12 */ \ - i = 13; \ - while (i--) \ - ARM_PUSH32(sp, 0); \ - \ - /* APSR */ \ - ARM_PUSH32(sp, 0); \ - \ - /* PRIMASK with interrupts enabled */ \ - ARM_PUSH32(sp, 0); \ - \ - task->sp = sp; \ -} while (0); - -#define ao_arch_save_regs() do { \ - /* Save general registers */ \ - asm("push {r0-r12,lr}\n"); \ - \ - /* Save APSR */ \ - asm("mrs r0,apsr"); \ - asm("push {r0}"); \ - \ - /* Save PRIMASK */ \ - asm("mrs r0,primask"); \ - asm("push {r0}"); \ - \ - /* Enable interrupts */ \ - sei(); \ - } while (0) - -#define ao_arch_save_stack() do { \ - uint32_t *sp; \ - asm("mov %0,sp" : "=&r" (sp) ); \ - ao_cur_task->sp = (sp); \ - if ((uint8_t *) sp < &ao_cur_task->stack[0]) \ - ao_panic (AO_PANIC_STACK); \ - } while (0) - -#if 0 -#define ao_arch_isr_stack() do { \ - uint32_t *sp = (uint32_t *) 0x20004000; \ - asm("mov %0,sp" : "=&r" (sp) ); \ - } while (0) -#else -#define ao_arch_isr_stack() -#endif - - -#define ao_arch_cpu_idle() do { \ - asm(".global ao_idle_loc\n\twfi\nao_idle_loc:"); \ - } while (0) - -#define ao_arch_restore_stack() do { \ - uint32_t sp; \ - sp = (uint32_t) ao_cur_task->sp; \ - \ - /* Switch stacks */ \ - asm("mov sp, %0" : : "r" (sp) ); \ - \ - /* Restore PRIMASK */ \ - asm("pop {r0}"); \ - asm("msr primask,r0"); \ - \ - /* Restore APSR */ \ - asm("pop {r0}"); \ - asm("msr apsr,r0"); \ - \ - /* Restore general registers */ \ - asm("pop {r0-r12,lr}\n"); \ - \ - /* Return to calling function */ \ - asm("bx lr"); \ - } while(0) - -#define ao_arch_critical(b) do { cli(); do { b } while (0); sei(); } while (0) /* * For now, we're running at a weird frequency diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h index e66d20d7..ca451a53 100644 --- a/src/stm/ao_arch_funcs.h +++ b/src/stm/ao_arch_funcs.h @@ -210,4 +210,103 @@ ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop); void ao_i2c_init(void); +#define ARM_PUSH32(stack, val) (*(--(stack)) = (val)) + +static inline uint32_t +ao_arch_irqsave(void) { + uint32_t primask; + asm("mrs %0,primask" : "=&r" (primask)); + ao_arch_block_interrupts(); + return primask; +} + +static inline void +ao_arch_irqrestore(uint32_t primask) { + asm("msr primask,%0" : : "r" (primask)); +} + +static inline void +ao_arch_memory_barrier() { + asm volatile("" ::: "memory"); +} + +static inline void +ao_arch_init_stack(struct ao_task *task, void *start) +{ + uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE); + uint32_t a = (uint32_t) start; + int i; + + /* Return address (goes into LR) */ + ARM_PUSH32(sp, a); + + /* Clear register values r0-r12 */ + i = 13; + while (i--) + ARM_PUSH32(sp, 0); + + /* APSR */ + ARM_PUSH32(sp, 0); + + /* PRIMASK with interrupts enabled */ + ARM_PUSH32(sp, 0); + + task->sp = sp; +} + +static inline void ao_arch_save_regs(void) { + /* Save general registers */ + asm("push {r0-r12,lr}\n"); + + /* Save APSR */ + asm("mrs r0,apsr"); + asm("push {r0}"); + + /* Save PRIMASK */ + asm("mrs r0,primask"); + asm("push {r0}"); +} + +static inline void ao_arch_save_stack(void) { + uint32_t *sp; + asm("mov %0,sp" : "=&r" (sp) ); + ao_cur_task->sp = (sp); + if ((uint8_t *) sp < &ao_cur_task->stack[0]) + ao_panic (AO_PANIC_STACK); +} + +static inline void ao_arch_restore_stack(void) { + uint32_t sp; + sp = (uint32_t) ao_cur_task->sp; + + /* Switch stacks */ + asm("mov sp, %0" : : "r" (sp) ); + + /* Restore PRIMASK */ + asm("pop {r0}"); + asm("msr primask,r0"); + + /* Restore APSR */ + asm("pop {r0}"); + asm("msr apsr,r0"); + + /* Restore general registers */ + asm("pop {r0-r12,lr}\n"); + + /* Return to calling function */ + asm("bx lr"); +} + +#define ao_arch_isr_stack() + +#define ao_arch_cpu_idle() do { \ + asm(".global ao_idle_loc\n\twfi\nao_idle_loc:"); \ + } while (0) + +#define ao_arch_critical(b) do { \ + ao_arch_block_interrupts(); \ + do { b } while (0); \ + ao_arch_release_interrupts(); \ + } while (0) + #endif /* _AO_ARCH_FUNCS_H_ */ diff --git a/src/stm/registers.ld b/src/stm/registers.ld index f8b224a2..95a86e35 100644 --- a/src/stm/registers.ld +++ b/src/stm/registers.ld @@ -46,6 +46,8 @@ stm_tim2 = 0x40000000; stm_nvic = 0xe000e100; +stm_scb = 0xe000ed00; + stm_mpu = 0xe000ed90; /* calibration data in system memory */ diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index d953aee4..0dbfae39 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -901,6 +901,36 @@ stm_nvic_get_priority(int irq) { return (stm_nvic.ipr[IRQ_PRIO_REG(irq)] >> IRQ_PRIO_BIT(irq)) & IRQ_PRIO_MASK(0); } +struct stm_scb { + vuint32_t cpuid; + vuint32_t icsr; + vuint32_t vtor; + vuint32_t aircr; + + vuint32_t scr; + vuint32_t ccr; + vuint32_t shpr1; + vuint32_t shpr2; + + vuint32_t shpr3; + vuint32_t shcrs; + vuint32_t cfsr; + vuint32_t hfsr; + + uint32_t unused_30; + vuint32_t mmfar; + vuint32_t bfar; +}; + +extern struct stm_scb stm_scb; + +#define STM_SCB_AIRCR_VECTKEY 16 +#define STM_SCB_AIRCR_VECTKEY_KEY 0x05fa +#define STM_SCB_AIRCR_PRIGROUP 8 +#define STM_SCB_AIRCR_SYSRESETREQ 2 +#define STM_SCB_AIRCR_VECTCLRACTIVE 1 +#define STM_SCB_AIRCR_VECTRESET 0 + struct stm_mpu { vuint32_t typer; vuint32_t cr; -- cgit v1.2.3 From 25435dcbc6416935aa432fc090ea977bfff5d153 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Sun, 24 Feb 2013 00:19:49 -0800 Subject: altos/stm: Add more bits to NVIC register definitions This cleans up a few values, adds more comments and a few more NVIC fields. Signed-off-by: Keith Packard --- src/stm/stm32l.h | 35 +++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) (limited to 'src/stm/stm32l.h') diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 0dbfae39..1d636037 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -811,30 +811,41 @@ extern struct stm_lcd stm_lcd; #define STM_LCD_CLR_UDDC (3) #define STM_LCD_CLR_SOFC (1) +/* The NVIC starts at 0xe000e100, so add that to the offsets to find the absolute address */ + struct stm_nvic { - vuint32_t iser[3]; /* 0x000 */ + vuint32_t iser[8]; /* 0x000 0xe000e100 Set Enable Register */ + + uint8_t _unused020[0x080 - 0x020]; + + vuint32_t icer[8]; /* 0x080 0xe000e180 Clear Enable Register */ - uint8_t _unused00c[0x080 - 0x00c]; + uint8_t _unused0a0[0x100 - 0x0a0]; - vuint32_t icer[3]; /* 0x080 */ + vuint32_t ispr[8]; /* 0x100 0xe000e200 Set Pending Register */ - uint8_t _unused08c[0x100 - 0x08c]; + uint8_t _unused120[0x180 - 0x120]; - vuint32_t ispr[3]; /* 0x100 */ + vuint32_t icpr[8]; /* 0x180 0xe000e280 Clear Pending Register */ - uint8_t _unused10c[0x180 - 0x10c]; + uint8_t _unused1a0[0x200 - 0x1a0]; - vuint32_t icpr[3]; /* 0x180 */ + vuint32_t iabr[8]; /* 0x200 0xe000e300 Active Bit Register */ - uint8_t _unused18c[0x200 - 0x18c]; + uint8_t _unused220[0x300 - 0x220]; - vuint32_t iabr[3]; /* 0x200 */ + vuint32_t ipr[60]; /* 0x300 0xe000e400 Priority Register */ - uint8_t _unused20c[0x300 - 0x20c]; + uint8_t _unused3f0[0xc00 - 0x3f0]; - vuint32_t ipr[21]; /* 0x300 */ + vuint32_t cpuid_base; /* 0xc00 0xe000ed00 CPUID Base Register */ + vuint32_t ics; /* 0xc04 0xe000ed04 Interrupt Control State Register */ + vuint32_t vto; /* 0xc08 0xe000ed08 Vector Table Offset Register */ + vuint32_t ai_rc; /* 0xc0c 0xe000ed0c Application Interrupt/Reset Control Register */ + vuint32_t sc; /* 0xc10 0xe000ed10 System Control Register */ + vuint32_t cc; /* 0xc14 0xe000ed14 Configuration Control Register */ - uint8_t _unused324[0xe00 - 0x324]; + uint8_t _unusedc18[0xe00 - 0xc18]; vuint32_t stir; /* 0xe00 */ }; -- cgit v1.2.3 From 091582c446319fe4a79154153ece5372b2faec83 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Wed, 1 May 2013 08:58:17 -0700 Subject: altos: Use SYSTICK on STM32L It's probably more power efficient than using one of the timers, and it's certainly easier to configure. Signed-off-by: Keith Packard --- src/stm/ao_arch.h | 1 + src/stm/ao_timer.c | 40 +++++++++------------------------------- src/stm/registers.ld | 2 ++ src/stm/stm32l.h | 18 ++++++++++++++++++ 4 files changed, 30 insertions(+), 31 deletions(-) (limited to 'src/stm/stm32l.h') diff --git a/src/stm/ao_arch.h b/src/stm/ao_arch.h index 007f7e2e..27a942f2 100644 --- a/src/stm/ao_arch.h +++ b/src/stm/ao_arch.h @@ -99,6 +99,7 @@ extern const uint32_t ao_radio_cal; #define AO_HCLK (AO_SYSCLK / AO_AHB_PRESCALER) #define AO_PCLK1 (AO_HCLK / AO_APB1_PRESCALER) #define AO_PCLK2 (AO_HCLK / AO_APB2_PRESCALER) +#define AO_SYSTICK (AO_HCLK / 8) #if AO_APB1_PRESCALER == 1 #define AO_TIM23467_CLK AO_PCLK1 diff --git a/src/stm/ao_timer.c b/src/stm/ao_timer.c index 8b7c2327..5976eb3f 100644 --- a/src/stm/ao_timer.c +++ b/src/stm/ao_timer.c @@ -31,14 +31,9 @@ volatile __data uint8_t ao_data_interval = 1; volatile __data uint8_t ao_data_count; #endif -void -ao_debug_out(char c); - - -void stm_tim6_isr(void) +void stm_systick_isr(void) { - if (stm_tim6.sr & (1 << STM_TIM67_SR_UIF)) { - stm_tim6.sr = 0; + if (stm_systick.csr & (1 << STM_SYSTICK_CSR_COUNTFLAG)) { ++ao_tick_count; #if HAS_TASK_QUEUE if (ao_task_alarm_tick && (int16_t) (ao_tick_count - ao_task_alarm_tick) >= 0) @@ -81,33 +76,16 @@ ao_timer_set_adc_interval(uint8_t interval) #define TIMER_10kHz ((AO_PCLK1 * TIMER_23467_SCALER) / 10000) +#define SYSTICK_RELOAD (AO_SYSTICK / 100 - 1) + void ao_timer_init(void) { - stm_nvic_set_enable(STM_ISR_TIM6_POS); - stm_nvic_set_priority(STM_ISR_TIM6_POS, AO_STM_NVIC_CLOCK_PRIORITY); - - /* Turn on timer 6 */ - stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_TIM6EN); - - stm_tim6.psc = TIMER_10kHz; - stm_tim6.arr = 99; - stm_tim6.cnt = 0; - - /* Enable update interrupt */ - stm_tim6.dier = (1 << STM_TIM67_DIER_UIE); - - /* Poke timer to reload values */ - stm_tim6.egr |= (1 << STM_TIM67_EGR_UG); - - stm_tim6.cr2 = (STM_TIM67_CR2_MMS_RESET << STM_TIM67_CR2_MMS); - - /* And turn it on */ - stm_tim6.cr1 = ((0 << STM_TIM67_CR1_ARPE) | - (0 << STM_TIM67_CR1_OPM) | - (1 << STM_TIM67_CR1_URS) | - (0 << STM_TIM67_CR1_UDIS) | - (1 << STM_TIM67_CR1_CEN)); + stm_systick.rvr = SYSTICK_RELOAD; + stm_systick.cvr = 0; + stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) | + (1 << STM_SYSTICK_CSR_TICKINT) | + (STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE)); } void diff --git a/src/stm/registers.ld b/src/stm/registers.ld index 95a86e35..8318c75a 100644 --- a/src/stm/registers.ld +++ b/src/stm/registers.ld @@ -44,6 +44,8 @@ stm_tim4 = 0x40000800; stm_tim3 = 0x40000400; stm_tim2 = 0x40000000; +stm_systick = 0xe000e010; + stm_nvic = 0xe000e100; stm_scb = 0xe000ed00; diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 1d636037..5c0748a6 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -811,6 +811,24 @@ extern struct stm_lcd stm_lcd; #define STM_LCD_CLR_UDDC (3) #define STM_LCD_CLR_SOFC (1) +/* The SYSTICK starts at 0xe000e010 */ + +struct stm_systick { + vuint32_t csr; + vuint32_t rvr; + vuint32_t cvr; + vuint32_t calib; +}; + +extern struct stm_systick stm_systick; + +#define STM_SYSTICK_CSR_ENABLE 0 +#define STM_SYSTICK_CSR_TICKINT 1 +#define STM_SYSTICK_CSR_CLKSOURCE 2 +#define STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 0 +#define STM_SYSTICK_CSR_CLKSOURCE_HCLK 1 +#define STM_SYSTICK_CSR_COUNTFLAG 16 + /* The NVIC starts at 0xe000e100, so add that to the offsets to find the absolute address */ struct stm_nvic { -- cgit v1.2.3 From 56a7cbbf51f5c9ebbfe17d1cc30ed807572af3cc Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Mon, 11 Mar 2013 00:01:52 -0700 Subject: altos: Add program flash function And get it loaded to RAM so it can execute correctly. Nothing calls it yet... Signed-off-by: Keith Packard --- src/stm-flash/Makefile | 1 + src/stm/altos-loader.ld | 31 +++++++++------ src/stm/ao_flash_stm.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++ src/stm/ao_flash_stm.h | 24 +++++++++++ src/stm/stm32l.h | 3 ++ 5 files changed, 151 insertions(+), 11 deletions(-) create mode 100644 src/stm/ao_flash_stm.c create mode 100644 src/stm/ao_flash_stm.h (limited to 'src/stm/stm32l.h') diff --git a/src/stm-flash/Makefile b/src/stm-flash/Makefile index fbc6603d..3c7b4966 100644 --- a/src/stm-flash/Makefile +++ b/src/stm-flash/Makefile @@ -24,6 +24,7 @@ ALTOS_SRC = \ ao_mutex.c \ ao_usb_stm.c \ ao_stdio.c \ + ao_flash_stm.c \ ao_cmd.c PRODUCT=StmFlash-v0.0 diff --git a/src/stm/altos-loader.ld b/src/stm/altos-loader.ld index 2d71b4ee..50a425c7 100644 --- a/src/stm/altos-loader.ld +++ b/src/stm/altos-loader.ld @@ -16,8 +16,8 @@ */ MEMORY { - rom (rx) : ORIGIN = 0x08000000, LENGTH = 8K - ram (!w) : ORIGIN = 0x20000000, LENGTH = 16K + rom : ORIGIN = 0x08000000, LENGTH = 8K + ram : ORIGIN = 0x20000000, LENGTH = 16K } INCLUDE registers.ld @@ -29,7 +29,7 @@ SECTIONS { * Rom contents */ - .text ORIGIN(rom) : { + .text : { __text_start__ = .; *(.interrupt) /* Interrupt vectors */ @@ -38,26 +38,35 @@ SECTIONS { ao_romconfig.o(.romconfig*) ao_product.o(.romconfig*) - *(.text*) /* Executable code */ - *(.rodata*) /* Constants */ + *(.text) /* Executable code */ + *(.rodata) /* Constants */ } > rom .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - __text_end__ = .; } > rom + __text_end__ = .; + + /* Functions placed in RAM (required for flashing) */ + .textram : { + __text_ram_start = .; + __data_start__ = .; + *(.text.ram) + . = ALIGN(4); + } >ram AT>rom + __text_ram_end = .; /* Data -- relocated to RAM, but written to ROM */ - .data ORIGIN(ram) : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) { - __data_start__ = .; + .data : { *(.data) /* initialized data */ - __data_end__ = .; - __bss_start__ = .; - } >ram + . = ALIGN (4); + } >ram AT>rom + __data_end__ = .; .bss : { + __bss_start__ = .; *(.bss) *(COMMON) __bss_end__ = .; diff --git a/src/stm/ao_flash_stm.c b/src/stm/ao_flash_stm.c new file mode 100644 index 00000000..b3ef6a62 --- /dev/null +++ b/src/stm/ao_flash_stm.c @@ -0,0 +1,103 @@ +/* + * Copyright © 2013 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + */ + +#include +#include + +static uint8_t +ao_flash_pecr_is_locked(void) +{ + return (stm_flash.pecr & (1 << STM_FLASH_PECR_PELOCK)) != 0; +} + +static uint8_t +ao_flash_pgr_is_locked(void) +{ + return (stm_flash.pecr & (1 << STM_FLASH_PECR_PRGLOCK)) != 0; +} + +static void +ao_flash_pecr_unlock(void) +{ + if (!ao_flash_pecr_is_locked()) + return; + + /* Unlock Data EEPROM and FLASH_PECR register */ + stm_flash.pekeyr = STM_FLASH_PEKEYR_PEKEY1; + stm_flash.pekeyr = STM_FLASH_PEKEYR_PEKEY2; +} + +static void +ao_flash_pgr_unlock(void) +{ + if (!ao_flash_pgr_is_locked()) + return; + + /* Unlock program memory */ + stm_flash.prgkeyr = STM_FLASH_PRGKEYR_PRGKEY1; + stm_flash.prgkeyr = STM_FLASH_PRGKEYR_PRGKEY2; +} + +static void +ao_flash_wait_bsy(void) +{ + while (stm_flash.sr & (1 << STM_FLASH_SR_BSY)) + ; +} + +static void +ao_flash_erase_page(uint32_t *page) +{ + ao_flash_pecr_unlock(); + ao_flash_pgr_unlock(); + + stm_flash.pecr |= (1 << STM_FLASH_PECR_ERASE); + stm_flash.pecr |= (1 << STM_FLASH_PECR_PROG); + + ao_flash_wait_bsy(); + + *page = 0x00000000; +} + +static void __attribute__ ((section(".text.ram"), noinline)) + _ao_flash_half_page(uint32_t *dst, uint32_t *src) +{ + uint8_t i; + + stm_flash.pecr |= (1 << STM_FLASH_PECR_FPRG); + stm_flash.pecr |= (1 << STM_FLASH_PECR_PROG); + while (stm_flash.sr & (1 << STM_FLASH_SR_BSY)) + ; + + for (i = 0; i < 32; i++) + *dst++ = *src++; +} + +void +ao_flash_page(uint32_t *page, uint32_t *src) +{ + uint8_t h; + + ao_flash_erase_page(page); + for (h = 0; h < 2; h++) { + ao_flash_pecr_unlock(); + ao_flash_pgr_unlock(); + _ao_flash_half_page(page, src); + page += 32; + src += 32; + } +} diff --git a/src/stm/ao_flash_stm.h b/src/stm/ao_flash_stm.h new file mode 100644 index 00000000..b4067d8d --- /dev/null +++ b/src/stm/ao_flash_stm.h @@ -0,0 +1,24 @@ +/* + * Copyright © 2013 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + */ + +#ifndef _AO_FLASH_STM_H_ +#define _AO_FLASH_STM_H_ + +void +ao_flash_page(uint32_t *page, uint32_t *src); + +#endif /* _AO_FLASH_STM_H_ */ diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 5c0748a6..63bde0f8 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -435,6 +435,9 @@ extern struct stm_flash stm_flash; #define STM_FLASH_PEKEYR_PEKEY1 0x89ABCDEF #define STM_FLASH_PEKEYR_PEKEY2 0x02030405 +#define STM_FLASH_PRGKEYR_PRGKEY1 0x8C9DAEBF +#define STM_FLASH_PRGKEYR_PRGKEY2 0x13141516 + struct stm_rcc { vuint32_t cr; vuint32_t icscr; -- cgit v1.2.3