| Commit message (Collapse) | Author | Age |
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ADXL375 requires SPI mode 3.
Signed-off-by: Keith Packard <keithp@keithp.com>
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And update all users to be explicit about the desired config.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This fills a data ring entry with all of the current sensor values
other than the ADC. It is used in all of the adc completion functions.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Remove address parameter (doesn't work with gcc), create shared
ao_romconfig in kernel.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This driver uses the generic GPIO functions and allows per-LED port
and pin configuration. It supports up to 32 LEDs.
Rename SoC-specific LED drivers.
Remove enabled parameter to ao_led_init
Signed-off-by: Keith Packard <keithp@keithp.com>
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This was used with the 8051 bit-addressing mode to provide
single-instruction access to GPIO pins.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Don't use a global variable to hold the result.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Stop using pdclib
Signed-off-by: Keith Packard <keithp@keithp.com>
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Provide PLL definitions for both values.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This saves a bit of space in the fox1ihu loader which uses the timer
interrupt to poke the watchdog.
Signed-off-by: Keith Packard <keithp@keithp.com>
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No need requiring it to be uint16_t
Signed-off-by: Keith Packard <keithp@keithp.com>
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These are fixed at 16 and 17.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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The ADC unit always uses the HSI timer.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This just fetches ADC values on demand instead of loading them
periodically into a ring buffer from the timer interrupt.
Signed-off-by: Keith Packard <keithp@keithp.com>
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If you've got a complicated LED pin arrangement, you can ask for each
one to be configured separately, instead of using groups in a couple
of GPIO registers. The code isn't as efficient this way, but at least
it's easy to read.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Products without a radio don't need this value.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This saves a bit of space, keeping the flash loader under 4k on fox
Signed-off-by: Keith Packard <keithp@keithp.com>
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Remove unnecessary 'offset' param (was always passed zero). This also
makes some code conditional on that value no longer necessary.
Signed-off-by: Keith Packard <keithp@keithp.com>
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The textram section must be aligned to 8 bytes to keep the linker
happy. However, if that section contains no data, the declaration will
set the __data_start__ value to that alignment, but the data section
itself would start on a 4-byte alignment, potentially 4 bytes lower
than the value indicated by __data_start__. This completely scrambles
initialized memory as the startup code will copy the data segment to
__data_start__, 4 bytes off of the actual data segment start.
Fix this by forcing the data segment to also be aligned to 8 bytes.
Signed-off-by: Keith Packard <keithp@keithp.com>
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The ring is updated when the ADC finishes; all of the other sensor
data needs to be copied in at that point.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Redefines some stdio bits so that we can build with either pdclib or
newlib + avr stdio.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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This is clearer than using '0'.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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If you try this after the UART is running, it won't work.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This allows other systems to see what baud rate the host has requested.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Lets cortexelf do more things with groups of pins, rather than one pin
at a time.
Signed-off-by: Keith Packard <keithp@keithp.com>
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ao_gpio_set_mask and ao_gpio_get_all
Signed-off-by: Keith Packard <keithp@keithp.com>
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Scans the matrix once per clock tick queuing events for changed keys.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Just adds the necessary defines to the code.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This lets code which needs finer control over DMA to use the channel
without interference, and leaves the DMA engine running so that it can.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This allows for high priority interrupts (priority 0) to run, even
when other interrupts are blocked. Code executing in such interrupt
handlers must not attempt to control task execution as that will race
with the scheduler.
Select this by defining AO_NONMASK_INTERRUPT in ao_pins.h.
non-maskable interrupt priority is AO_STM_NVIC_NONMASK_PRIORITY
Signed-off-by: Keith Packard <keithp@keithp.com>
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Because the STM32L only offers 16 priority levels, the bottom four
bits of each priority mask are not used. All of the interrupt priority
settings in the system were using values < 16, making them all
effectively the same. Fix that by moving them into the upper 4 bits
and using symbolic constants everywhere.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Gcc 5.4.1 tracks alignment of data through assignments, so that a
uint32_t pointer which comes from byte-aligned uint8_t data:
extern uint8_t foo[];
uint32_t *q = (void *) foo;
Fetches and stores through this pointer are done bytewise. This is
slow (meh), but if q references a device register, things to bad very
quickly.
This patch works around this bug in the compiler by adding
__attribute__((aligned(4))) tags to some variables, or changing them
from uint8_t to uint32_t. Places doing this will now be caught as I've
added -Wcast-align to the compiler flags. That required adding (void
*) casts, after the relevant code was checked to make sure the
compiler could tell that the addresses were aligned.
Signed-off-by: Keith Packard <keithp@keithp.com>
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I'm sure this makes the function end up in-lined, which saves enough
text space to fit the flash loader in ROM again.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Set spi slave DMA priority MOSI to HIGH and MISO to VERY_HIGH. Slave
SPI doesn't have the luxury of slowing down when the system is busy,
so provide it maximum memory bandwidth to try and keep up with the
master.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Make sure receive DMA is higher than any TX dma so that
it always runs in preference.
Signed-off-by: Keith Packard <keithp@keithp.com>
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When the MISO DMA priority is too low, and the processor gets busy,
it's possible for SPI input to overrun the processor, which causes the
MISO DMA to get out of sync and never finish. Set the MISO DMA
priority to HIGH to avoid this.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Instead of having nearly duplicate versions of the SPI DMA
configuration calls, create helper funcs that do most of the work so
that the SPI API funcs are shorter and clearer.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Provides a bit better typechecking opportunities for this function.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Was computing (1 << pin) twice for no good reason.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This provides inline functions for sending and receiving individual
bytes, and setup/finish functions to wrap them in. This make the byte
sending respect the SPI hardware interface requirements.
Signed-off-by: Keith Packard <keithp@keithp.com>
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