| Commit message (Collapse) | Author | Age |
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Unused variables, mismatching signed/unsigned and a few other misc
warnings.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This asks the EXTI code to not mess with the pin configuration so that
the MS5607 driver can get interrupts on the MISO pin while still using
it for SPI.
Signed-off-by: Keith Packard <keithp@keithp.com>
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They all get set to the correct value when enabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Needed to support general GPIO interrupts
Signed-off-by: Keith Packard <keithp@keithp.com>
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Integrate interleaving, CRC and padding within the decode/encode
functions.
Provide for ISR priorities so that the 1120 RX interrupt takes
precedence over the other interrupts or we risk losing bits.
Optimize the viterbi decoder a bit (goes from 10ms per packet to 7ms
per packet).
Signed-off-by: Keith Packard <keithp@keithp.com>
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Interrupt-per-bit, but it seems to work
Signed-off-by: Keith Packard <keithp@keithp.com>
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Make sure the edge mode registers are set according to the requested
mode.
Clear any pending interrupt when enabling to avoid spurious isr call
Signed-off-by: Keith Packard <keithp@keithp.com>
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Which GPIO a particular pin interrupt comes from is selected by the
SYSCFG EXTICR registers; set these when an exti interrupt is configured.
Signed-off-by: Keith Packard <keithp@keithp.com>
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This does "something" in radio test mode, appearing to generate a
730MHz signal.
Signed-off-by: Keith Packard <keithp@keithp.com>
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