| Commit message (Collapse) | Author | Age |
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Also, move the demo drawing into the stm-vga app and out of the vga
driver.
Signed-off-by: Keith Packard <keithp@keithp.com>
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If we load the scanline register while DMA is running, it doesn't
actually get reloaded until after the first transfer from the next
line, leaving a weird jog in the middle of the screen.
Also flip to SPI1, as Bdale is using that on the 1802 board.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Generates vsync/hsync using timers and pixel data using the SPI port.
320x240 video using 640x480 mode and a 24MHz "pixel" clock.
Includes the beginings of rendering code for the frame buffer,
including bitblt, solid fill and text with a 5x7 font.
Signed-off-by: Keith Packard <keithp@keithp.com>
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