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This was used with the 8051 bit-addressing mode to provide
single-instruction access to GPIO pins.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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This lets the cc1111 use the atomic bit operation instead of a mask,
which is immune to interrupt issues as well as being a shorter code sequence.
Signed-off-by: Keith Packard <keithp@keithp.com>
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STM needs it to be provided when enabling the SPI device, so just fix
AVR and cc1111 to do the same.
Signed-off-by: Keith Packard <keithp@keithp.com>
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The STM32L151 has several SPI busses, and we want to use more than
one, so add a 'bus' parameter to the SPI interfaces. To avoid wasting
time on AVR and CC1111 processors which only use one SPI bus, elide
those parameters from the actual functions by wrapping them with
macros.
Configuring chip select is now all macroized so that each chip can
have its own version, allowing the STM to share the various SPI device
drivers with the cc1111 and avr processors. Note that only the M25
driver has been ported; porting the others is 'trivial', but not
necessary at this point.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Some architecture specific stuff needs to use core altos code, so
create new ao_arch_funcs.h files per architecture that get pulled in
at the end of ao.h
Signed-off-by: Keith Packard <keithp@keithp.com>
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