diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/adc-serial/Makefile | 47 | ||||
| -rw-r--r-- | target/adc-serial/adc_serial.c | 578 | ||||
| -rw-r--r-- | target/adc/Makefile | 47 | ||||
| -rw-r--r-- | target/adc/adc.c | 470 | ||||
| -rw-r--r-- | target/beep-timer/Makefile | 47 | ||||
| -rw-r--r-- | target/beep-timer/beep_timer.c | 204 | ||||
| -rw-r--r-- | target/beep/Makefile | 46 | ||||
| -rw-r--r-- | target/beep/beep.c | 91 | ||||
| -rw-r--r-- | target/blink/.gitignore | 13 | ||||
| -rw-r--r-- | target/blink/Makefile | 46 | ||||
| -rw-r--r-- | target/blink/blink.c | 100 | ||||
| -rw-r--r-- | target/dma/Makefile | 46 | ||||
| -rw-r--r-- | target/dma/dma.c | 361 | ||||
| -rw-r--r-- | target/ee/Makefile | 46 | ||||
| -rw-r--r-- | target/ee/ee.c | 407 | ||||
| -rw-r--r-- | target/isr.c | 89 | ||||
| -rw-r--r-- | target/radio/Makefile | 52 | ||||
| -rw-r--r-- | target/radio/init.c | 207 | ||||
| -rw-r--r-- | target/radio/radio.h | 435 | ||||
| -rw-r--r-- | target/radio/recv.c | 68 | ||||
| -rw-r--r-- | target/radio/xmit.c | 47 | ||||
| -rw-r--r-- | target/serial/Makefile | 46 | ||||
| -rw-r--r-- | target/serial/serial.c | 270 | ||||
| -rw-r--r-- | target/simple/Makefile | 44 | ||||
| -rw-r--r-- | target/simple/simple.c | 42 | ||||
| -rw-r--r-- | target/timer/Makefile | 44 | ||||
| -rw-r--r-- | target/timer/cc1111.h | 294 | ||||
| -rw-r--r-- | target/timer/timer.c | 55 |
28 files changed, 0 insertions, 4242 deletions
diff --git a/target/adc-serial/Makefile b/target/adc-serial/Makefile deleted file mode 100644 index 9a8bf5c6..00000000 --- a/target/adc-serial/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -PROG=adc_serial -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --stack-auto --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf800 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=$(PROG).c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=$(PROG)-flash.ihx $(PROG)-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -$(PROG)-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o $(PROG)-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o $(PROG)-flash.ihx $(REL) - -$(PROG)-flash.ihx: $(PROG)-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/adc-serial/adc_serial.c b/target/adc-serial/adc_serial.c deleted file mode 100644 index 1f7b6880..00000000 --- a/target/adc-serial/adc_serial.c +++ /dev/null @@ -1,578 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -/* - * Test ADC in DMA mode - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -/* - * UART registers - */ - -sfr at 0x86 U0CSR; -sfr at 0xF8 U1CSR; - -/* - * IRCON2 - */ -sfr at 0xE8 IRCON2; /* CPU Interrupt Flag 5 */ - -sbit at 0xE8 USBIF; /* USB interrupt flag (shared with Port2) */ -sbit at 0xE8 P2IF; /* Port2 interrupt flag (shared with USB) */ -sbit at 0xE9 UTX0IF; /* USART0 TX interrupt flag */ -sbit at 0xEA UTX1IF; /* USART1 TX interrupt flag (shared with I2S TX) */ -sbit at 0xEA I2STXIF; /* I2S TX interrupt flag (shared with USART1 TX) */ -sbit at 0xEB P1IF; /* Port1 interrupt flag */ -sbit at 0xEC WDTIF; /* Watchdog timer interrupt flag */ - -# define UxCSR_MODE_UART (1 << 7) -# define UxCSR_MODE_SPI (0 << 7) -# define UxCSR_RE (1 << 6) -# define UxCSR_SLAVE (1 << 5) -# define UxCSR_MASTER (0 << 5) -# define UxCSR_FE (1 << 4) -# define UxCSR_ERR (1 << 3) -# define UxCSR_RX_BYTE (1 << 2) -# define UxCSR_TX_BYTE (1 << 1) -# define UxCSR_ACTIVE (1 << 0) - -sfr at 0xc4 U0UCR; -sfr at 0xfb U1UCR; - -# define UxUCR_FLUSH (1 << 7) -# define UxUCR_FLOW_DISABLE (0 << 6) -# define UxUCR_FLOW_ENABLE (1 << 6) -# define UxUCR_D9_EVEN_PARITY (0 << 5) -# define UxUCR_D9_ODD_PARITY (1 << 5) -# define UxUCR_BIT9_8_BITS (0 << 4) -# define UxUCR_BIT9_9_BITS (1 << 4) -# define UxUCR_PARITY_DISABLE (0 << 3) -# define UxUCR_PARITY_ENABLE (1 << 3) -# define UxUCR_SPB_1_STOP_BIT (0 << 2) -# define UxUCR_SPB_2_STOP_BITS (1 << 2) -# define UxUCR_STOP_LOW (0 << 1) -# define UxUCR_STOP_HIGH (1 << 1) -# define UxUCR_START_LOW (0 << 0) -# define UxUCR_START_HIGH (1 << 0) - -sfr at 0xc5 U0GCR; -sfr at 0xfc U1GCR; - -# define UxGCR_CPOL_NEGATIVE (0 << 7) -# define UxGCR_CPOL_POSITIVE (1 << 7) -# define UxGCR_CPHA_FIRST_EDGE (0 << 6) -# define UxGCR_CPHA_SECOND_EDGE (1 << 6) -# define UxGCR_ORDER_LSB (0 << 5) -# define UxGCR_ORDER_MSB (1 << 5) -# define UxGCR_BAUD_E_MASK (0x1f) -# define UxGCR_BAUD_E_SHIFT 0 - -sfr at 0xc1 U0DBUF; -sfr at 0xf9 U1DBUF; -sfr at 0xc2 U0BAUD; -sfr at 0xfa U1BAUD; - -#define DEBUG P1_1 - - -# define DMA_LEN_HIGH_VLEN_MASK (7 << 5) -# define DMA_LEN_HIGH_VLEN_LEN (0 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_1 (1 << 5) -# define DMA_LEN_HIGH_VLEN (2 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_2 (3 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_3 (4 << 5) -# define DMA_LEN_HIGH_MASK (0x1f) - -# define DMA_CFG0_WORDSIZE_8 (0 << 7) -# define DMA_CFG0_WORDSIZE_16 (1 << 7) -# define DMA_CFG0_TMODE_MASK (3 << 5) -# define DMA_CFG0_TMODE_SINGLE (0 << 5) -# define DMA_CFG0_TMODE_BLOCK (1 << 5) -# define DMA_CFG0_TMODE_REPEATED_SINGLE (2 << 5) -# define DMA_CFG0_TMODE_REPEATED_BLOCK (3 << 5) - -/* - * DMA triggers - */ -# define DMA_CFG0_TRIGGER_NONE 0 -# define DMA_CFG0_TRIGGER_PREV 1 -# define DMA_CFG0_TRIGGER_T1_CH0 2 -# define DMA_CFG0_TRIGGER_T1_CH1 3 -# define DMA_CFG0_TRIGGER_T1_CH2 4 -# define DMA_CFG0_TRIGGER_T2_OVFL 6 -# define DMA_CFG0_TRIGGER_T3_CH0 7 -# define DMA_CFG0_TRIGGER_T3_CH1 8 -# define DMA_CFG0_TRIGGER_T4_CH0 9 -# define DMA_CFG0_TRIGGER_T4_CH1 10 -# define DMA_CFG0_TRIGGER_IOC_0 12 -# define DMA_CFG0_TRIGGER_IOC_1 13 -# define DMA_CFG0_TRIGGER_URX0 14 -# define DMA_CFG0_TRIGGER_UTX0 15 -# define DMA_CFG0_TRIGGER_URX1 16 -# define DMA_CFG0_TRIGGER_UTX1 17 -# define DMA_CFG0_TRIGGER_FLASH 18 -# define DMA_CFG0_TRIGGER_RADIO 19 -# define DMA_CFG0_TRIGGER_ADC_CHALL 20 -# define DMA_CFG0_TRIGGER_ADC_CH0 21 -# define DMA_CFG0_TRIGGER_ADC_CH1 22 -# define DMA_CFG0_TRIGGER_ADC_CH2 23 -# define DMA_CFG0_TRIGGER_ADC_CH3 24 -# define DMA_CFG0_TRIGGER_ADC_CH4 25 -# define DMA_CFG0_TRIGGER_ADC_CH5 26 -# define DMA_CFG0_TRIGGER_ADC_CH6 27 -# define DMA_CFG0_TRIGGER_I2SRX 27 -# define DMA_CFG0_TRIGGER_ADC_CH7 28 -# define DMA_CFG0_TRIGGER_I2STX 28 -# define DMA_CFG0_TRIGGER_ENC_DW 29 -# define DMA_CFG0_TRIGGER_DNC_UP 30 - -# define DMA_CFG1_SRCINC_MASK (3 << 6) -# define DMA_CFG1_SRCINC_0 (0 << 6) -# define DMA_CFG1_SRCINC_1 (1 << 6) -# define DMA_CFG1_SRCINC_2 (2 << 6) -# define DMA_CFG1_SRCINC_MINUS_1 (3 << 6) - -# define DMA_CFG1_DESTINC_MASK (3 << 4) -# define DMA_CFG1_DESTINC_0 (0 << 4) -# define DMA_CFG1_DESTINC_1 (1 << 4) -# define DMA_CFG1_DESTINC_2 (2 << 4) -# define DMA_CFG1_DESTINC_MINUS_1 (3 << 4) - -# define DMA_CFG1_IRQMASK (1 << 3) -# define DMA_CFG1_M8 (1 << 2) - -# define DMA_CFG1_PRIORITY_MASK (3 << 0) -# define DMA_CFG1_PRIORITY_LOW (0 << 0) -# define DMA_CFG1_PRIORITY_NORMAL (1 << 0) -# define DMA_CFG1_PRIORITY_HIGH (2 << 0) - -/* - * DMAARM - DMA Channel Arm - */ - -sfr at 0xD6 DMAARM; - -# define DMAARM_ABORT (1 << 7) -# define DMAARM_DMAARM4 (1 << 4) -# define DMAARM_DMAARM3 (1 << 3) -# define DMAARM_DMAARM2 (1 << 2) -# define DMAARM_DMAARM1 (1 << 1) -# define DMAARM_DMAARM0 (1 << 0) - -/* - * DMAREQ - DMA Channel Start Request and Status - */ - -sfr at 0xD7 DMAREQ; - -# define DMAREQ_DMAREQ4 (1 << 4) -# define DMAREQ_DMAREQ3 (1 << 3) -# define DMAREQ_DMAREQ2 (1 << 2) -# define DMAREQ_DMAREQ1 (1 << 1) -# define DMAREQ_DMAREQ0 (1 << 0) - -/* - * DMA configuration 0 address - */ - -sfr at 0xD5 DMA0CFGH; -sfr at 0xD4 DMA0CFGL; - -/* - * DMA configuration 1-4 address - */ - -sfr at 0xD3 DMA1CFGH; -sfr at 0xD2 DMA1CFGL; - -/* - * DMAIRQ - DMA Interrupt Flag - */ - -sfr at 0xD1 DMAIRQ; - -# define DMAIRQ_DMAIF4 (1 << 4) -# define DMAIRQ_DMAIF3 (1 << 3) -# define DMAIRQ_DMAIF2 (1 << 2) -# define DMAIRQ_DMAIF1 (1 << 1) -# define DMAIRQ_DMAIF0 (1 << 0) - -struct cc_dma_channel { - uint8_t src_high; - uint8_t src_low; - uint8_t dst_high; - uint8_t dst_low; - uint8_t len_high; - uint8_t len_low; - uint8_t cfg0; - uint8_t cfg1; -}; - -/* - * ADC Data register, low and high - */ -sfr at 0xBA ADCL; -sfr at 0xBB ADCH; -__xdata __at (0xDFBA) volatile uint16_t ADCXDATA; - -/* - * ADC Control Register 1 - */ -sfr at 0xB4 ADCCON1; - -# define ADCCON1_EOC (1 << 7) /* conversion complete */ -# define ADCCON1_ST (1 << 6) /* start conversion */ - -# define ADCCON1_STSEL_MASK (3 << 4) /* start select */ -# define ADCCON1_STSEL_EXTERNAL (0 << 4) /* P2_0 pin triggers */ -# define ADCCON1_STSEL_FULLSPEED (1 << 4) /* full speed, no waiting */ -# define ADCCON1_STSEL_TIMER1 (2 << 4) /* timer 1 channel 0 */ -# define ADCCON1_STSEL_START (3 << 4) /* set start bit */ - -# define ADCCON1_RCTRL_MASK (3 << 2) /* random number control */ -# define ADCCON1_RCTRL_COMPLETE (0 << 2) /* operation completed */ -# define ADCCON1_RCTRL_CLOCK_LFSR (1 << 2) /* Clock the LFSR once */ - -/* - * ADC Control Register 2 - */ -sfr at 0xB5 ADCCON2; - -# define ADCCON2_SREF_MASK (3 << 6) /* reference voltage */ -# define ADCCON2_SREF_1_25V (0 << 6) /* internal 1.25V */ -# define ADCCON2_SREF_EXTERNAL (1 << 6) /* external on AIN7 cc1110 */ -# define ADCCON2_SREF_VDD (2 << 6) /* VDD on the AVDD pin */ -# define ADCCON2_SREF_EXTERNAL_DIFF (3 << 6) /* external on AIN6-7 cc1110 */ - -# define ADCCON2_SDIV_MASK (3 << 4) /* decimation rate */ -# define ADCCON2_SDIV_64 (0 << 4) /* 7 bits */ -# define ADCCON2_SDIV_128 (1 << 4) /* 9 bits */ -# define ADCCON2_SDIV_256 (2 << 4) /* 10 bits */ -# define ADCCON2_SDIV_512 (3 << 4) /* 12 bits */ - -# define ADCCON2_SCH_MASK (0xf << 0) /* Sequence channel select */ -# define ADCCON2_SCH_SHIFT 0 -# define ADCCON2_SCH_AIN0 (0 << 0) -# define ADCCON2_SCH_AIN1 (1 << 0) -# define ADCCON2_SCH_AIN2 (2 << 0) -# define ADCCON2_SCH_AIN3 (3 << 0) -# define ADCCON2_SCH_AIN4 (4 << 0) -# define ADCCON2_SCH_AIN5 (5 << 0) -# define ADCCON2_SCH_AIN6 (6 << 0) -# define ADCCON2_SCH_AIN7 (7 << 0) -# define ADCCON2_SCH_AIN0_AIN1 (8 << 0) -# define ADCCON2_SCH_AIN2_AIN3 (9 << 0) -# define ADCCON2_SCH_AIN4_AIN5 (0xa << 0) -# define ADCCON2_SCH_AIN6_AIN7 (0xb << 0) -# define ADCCON2_SCH_GND (0xc << 0) -# define ADCCON2_SCH_VREF (0xd << 0) -# define ADCCON2_SCH_TEMP (0xe << 0) -# define ADCCON2_SCH_VDD_3 (0xf << 0) - - -/* - * ADC Control Register 3 - */ - -sfr at 0xB6 ADCCON3; - -# define ADCCON3_EREF_MASK (3 << 6) /* extra conversion reference */ -# define ADCCON3_EREF_1_25 (0 << 6) /* internal 1.25V */ -# define ADCCON3_EREF_EXTERNAL (1 << 6) /* external AIN7 cc1110 */ -# define ADCCON3_EREF_VDD (2 << 6) /* VDD on the AVDD pin */ -# define ADCCON3_EREF_EXTERNAL_DIFF (3 << 6) /* external AIN6-7 cc1110 */ -# define ADCCON2_EDIV_MASK (3 << 4) /* extral decimation */ -# define ADCCON2_EDIV_64 (0 << 4) /* 7 bits */ -# define ADCCON2_EDIV_128 (1 << 4) /* 9 bits */ -# define ADCCON2_EDIV_256 (2 << 4) /* 10 bits */ -# define ADCCON2_EDIV_512 (3 << 4) /* 12 bits */ -# define ADCCON3_ECH_MASK (0xf << 0) /* Sequence channel select */ -# define ADCCON3_ECH_SHIFT 0 -# define ADCCON3_ECH_AIN0 (0 << 0) -# define ADCCON3_ECH_AIN1 (1 << 0) -# define ADCCON3_ECH_AIN2 (2 << 0) -# define ADCCON3_ECH_AIN3 (3 << 0) -# define ADCCON3_ECH_AIN4 (4 << 0) -# define ADCCON3_ECH_AIN5 (5 << 0) -# define ADCCON3_ECH_AIN6 (6 << 0) -# define ADCCON3_ECH_AIN7 (7 << 0) -# define ADCCON3_ECH_AIN0_AIN1 (8 << 0) -# define ADCCON3_ECH_AIN2_AIN3 (9 << 0) -# define ADCCON3_ECH_AIN4_AIN5 (0xa << 0) -# define ADCCON3_ECH_AIN6_AIN7 (0xb << 0) -# define ADCCON3_ECH_GND (0xc << 0) -# define ADCCON3_ECH_VREF (0xd << 0) -# define ADCCON3_ECH_TEMP (0xe << 0) -# define ADCCON3_ECH_VDD_3 (0xf << 0) - -sfr at 0xF2 ADCCFG; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - unsigned char j = 0; - - n++; - while (--n != 0) - while (--i != 0) - while (--j != 0) - nop(); -} - -void -debug_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - DEBUG = byte & 1; - delay(5); - byte >>= 1; - } -} - -struct cc_dma_channel __xdata dma_config; - -#define ADC_LEN 6 - -/* The DMA engine writes to XDATA in MSB order */ -struct dma_xdata16 { - uint8_t high; - uint8_t low; -}; - -struct dma_xdata16 adc_output[ADC_LEN]; - -#define DMA_XDATA16(a,n) ((uint16_t) ((a)[n].high << 8) | (uint16_t) (a[n].low)) - -#define ADDRH(a) (((uint16_t) (a)) >> 8) -#define ADDRL(a) (((uint16_t) (a))) - -void -adc_init(void) -{ - dma_config.cfg0 = (DMA_CFG0_WORDSIZE_16 | - DMA_CFG0_TMODE_REPEATED_SINGLE | - DMA_CFG0_TRIGGER_ADC_CHALL); - dma_config.cfg1 = (DMA_CFG1_SRCINC_0 | - DMA_CFG1_DESTINC_1 | - DMA_CFG1_PRIORITY_NORMAL); - - dma_config.src_high = ADDRH(&ADCXDATA); - dma_config.src_low = ADDRL(&ADCXDATA); - dma_config.dst_high = ADDRH(adc_output); - dma_config.dst_low = ADDRL(adc_output); - dma_config.len_high = 0; - dma_config.len_low = ADC_LEN; - DMA0CFGH = ADDRH(&dma_config); - DMA0CFGL = ADDRL(&dma_config); - ADCCFG = ((1 << 0) | /* acceleration */ - (1 << 1) | /* pressure */ - (1 << 2) | /* temperature */ - (1 << 3) | /* battery voltage */ - (1 << 4) | /* drogue sense */ - (1 << 5)); /* main sense */ - - ADCCON1 = (ADCCON1_STSEL_START); /* ST bit triggers */ - ADCCON2 = (ADCCON2_SREF_VDD | /* reference voltage is VDD */ - ADCCON2_SDIV_512 | /* 12 bit ADC results */ - ADCCON2_SCH_AIN5); /* sample all 6 inputs */ -} - -void -adc_run(void) -{ - DMAIRQ &= ~1; - DMAARM |= 1; - ADCCON1 |= ADCCON1_ST; - while ((DMAIRQ & 1) == 0) - ; -} - -/* - * This version uses the USART in UART mode - */ -void -usart_init(void) -{ - P1DIR |= (1 << 2); - /* - * Configure the peripheral pin choices - * for both of the serial ports - * - * Note that telemetrum will use U1CFG_ALT_2 - * but that overlaps with SPI ALT_2, so until - * we can test that this works, we'll set this - * to ALT_1 - */ - PERCFG = (PERCFG_U1CFG_ALT_2 | - PERCFG_U0CFG_ALT_1); - - /* - * Make the UART pins controlled by the UART - * hardware - */ - P1SEL |= ((1 << 6) | (1 << 7)); - - /* - * UART mode with the receiver enabled - */ - U1CSR = (UxCSR_MODE_UART | - UxCSR_RE); - /* - * Pick a 38.4kbaud rate - */ - U1BAUD = 163; - U1GCR = 10 << UxGCR_BAUD_E_SHIFT; /* 38400 */ -// U1GCR = 3 << UxGCR_BAUD_E_SHIFT; /* 300 */ - /* - * Reasonable serial parameters - */ - U1UCR = (UxUCR_FLUSH | - UxUCR_FLOW_DISABLE | - UxUCR_D9_ODD_PARITY | - UxUCR_BIT9_8_BITS | - UxUCR_PARITY_DISABLE | - UxUCR_SPB_2_STOP_BITS | - UxUCR_STOP_HIGH | - UxUCR_START_LOW); -} - -void -usart_out_byte(uint8_t byte) -{ - U1DBUF = byte; - while (!UTX1IF) - ; - UTX1IF = 0; -} - -void -usart_out_string(uint8_t *string) -{ - uint8_t b; - - while (b = *string++) - usart_out_byte(b); -} - -#define NUM_LEN 6 - -uint8_t __xdata num_buffer[NUM_LEN]; -uint8_t __xdata * __xdata num_ptr; - -void -usart_out_number(uint16_t v) -{ - - num_ptr = num_buffer + NUM_LEN; - *--num_ptr = '\0'; - do { - *--num_ptr = '0' + v % 10; - v /= 10; - } while (v); - while (num_ptr != num_buffer) - *--num_ptr = ' '; - usart_out_string(num_buffer); -} - -#define ADC(n) DMA_XDATA16(adc_output,n) - -main () -{ - P1DIR = 3; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - - adc_init(); - P1_0 = 1; - usart_init(); - for (;;) { - adc_run(); - usart_out_string("accel: "); - usart_out_number(ADC(0)); - usart_out_string(" pres: "); - usart_out_number(ADC(1)); - usart_out_string(" temp: "); - usart_out_number(ADC(2)); - usart_out_string(" batt: "); - usart_out_number(ADC(3)); - usart_out_string(" drogue: "); - usart_out_number(ADC(4)); - usart_out_string(" main: "); - usart_out_number(ADC(5)); - usart_out_string("\r\n"); - delay(10); - } -} diff --git a/target/adc/Makefile b/target/adc/Makefile deleted file mode 100644 index 54c1211a..00000000 --- a/target/adc/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -PROG=adc -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf800 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=$(PROG).c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=$(PROG)-flash.ihx $(PROG)-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -$(PROG)-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o $(PROG)-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o $(PROG)-flash.ihx $(REL) - -$(PROG)-flash.ihx: $(PROG)-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/adc/adc.c b/target/adc/adc.c deleted file mode 100644 index 3a63a2c6..00000000 --- a/target/adc/adc.c +++ /dev/null @@ -1,470 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -/* - * Test ADC in DMA mode - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -/* - * UART registers - */ - -sfr at 0x86 U0CSR; -sfr at 0xF8 U1CSR; - -/* - * IRCON2 - */ -sfr at 0xE8 IRCON2; /* CPU Interrupt Flag 5 */ - -sbit at 0xE8 USBIF; /* USB interrupt flag (shared with Port2) */ -sbit at 0xE8 P2IF; /* Port2 interrupt flag (shared with USB) */ -sbit at 0xE9 UTX0IF; /* USART0 TX interrupt flag */ -sbit at 0xEA UTX1IF; /* USART1 TX interrupt flag (shared with I2S TX) */ -sbit at 0xEA I2STXIF; /* I2S TX interrupt flag (shared with USART1 TX) */ -sbit at 0xEB P1IF; /* Port1 interrupt flag */ -sbit at 0xEC WDTIF; /* Watchdog timer interrupt flag */ - -# define UxCSR_MODE_UART (1 << 7) -# define UxCSR_MODE_SPI (0 << 7) -# define UxCSR_RE (1 << 6) -# define UxCSR_SLAVE (1 << 5) -# define UxCSR_MASTER (0 << 5) -# define UxCSR_FE (1 << 4) -# define UxCSR_ERR (1 << 3) -# define UxCSR_RX_BYTE (1 << 2) -# define UxCSR_TX_BYTE (1 << 1) -# define UxCSR_ACTIVE (1 << 0) - -sfr at 0xc4 U0UCR; -sfr at 0xfb U1UCR; - -# define UxUCR_FLUSH (1 << 7) -# define UxUCR_FLOW_DISABLE (0 << 6) -# define UxUCR_FLOW_ENABLE (1 << 6) -# define UxUCR_D9_EVEN_PARITY (0 << 5) -# define UxUCR_D9_ODD_PARITY (1 << 5) -# define UxUCR_BIT9_8_BITS (0 << 4) -# define UxUCR_BIT9_9_BITS (1 << 4) -# define UxUCR_PARITY_DISABLE (0 << 3) -# define UxUCR_PARITY_ENABLE (1 << 3) -# define UxUCR_SPB_1_STOP_BIT (0 << 2) -# define UxUCR_SPB_2_STOP_BITS (1 << 2) -# define UxUCR_STOP_LOW (0 << 1) -# define UxUCR_STOP_HIGH (1 << 1) -# define UxUCR_START_LOW (0 << 0) -# define UxUCR_START_HIGH (1 << 0) - -sfr at 0xc5 U0GCR; -sfr at 0xfc U1GCR; - -# define UxGCR_CPOL_NEGATIVE (0 << 7) -# define UxGCR_CPOL_POSITIVE (1 << 7) -# define UxGCR_CPHA_FIRST_EDGE (0 << 6) -# define UxGCR_CPHA_SECOND_EDGE (1 << 6) -# define UxGCR_ORDER_LSB (0 << 5) -# define UxGCR_ORDER_MSB (1 << 5) -# define UxGCR_BAUD_E_MASK (0x1f) -# define UxGCR_BAUD_E_SHIFT 0 - -sfr at 0xc1 U0DBUF; -sfr at 0xf9 U1DBUF; -sfr at 0xc2 U0BAUD; -sfr at 0xfa U1BAUD; - -#define DEBUG P1_1 - - -# define DMA_LEN_HIGH_VLEN_MASK (7 << 5) -# define DMA_LEN_HIGH_VLEN_LEN (0 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_1 (1 << 5) -# define DMA_LEN_HIGH_VLEN (2 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_2 (3 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_3 (4 << 5) -# define DMA_LEN_HIGH_MASK (0x1f) - -# define DMA_CFG0_WORDSIZE_8 (0 << 7) -# define DMA_CFG0_WORDSIZE_16 (1 << 7) -# define DMA_CFG0_TMODE_MASK (3 << 5) -# define DMA_CFG0_TMODE_SINGLE (0 << 5) -# define DMA_CFG0_TMODE_BLOCK (1 << 5) -# define DMA_CFG0_TMODE_REPEATED_SINGLE (2 << 5) -# define DMA_CFG0_TMODE_REPEATED_BLOCK (3 << 5) - -/* - * DMA triggers - */ -# define DMA_CFG0_TRIGGER_NONE 0 -# define DMA_CFG0_TRIGGER_PREV 1 -# define DMA_CFG0_TRIGGER_T1_CH0 2 -# define DMA_CFG0_TRIGGER_T1_CH1 3 -# define DMA_CFG0_TRIGGER_T1_CH2 4 -# define DMA_CFG0_TRIGGER_T2_OVFL 6 -# define DMA_CFG0_TRIGGER_T3_CH0 7 -# define DMA_CFG0_TRIGGER_T3_CH1 8 -# define DMA_CFG0_TRIGGER_T4_CH0 9 -# define DMA_CFG0_TRIGGER_T4_CH1 10 -# define DMA_CFG0_TRIGGER_IOC_0 12 -# define DMA_CFG0_TRIGGER_IOC_1 13 -# define DMA_CFG0_TRIGGER_URX0 14 -# define DMA_CFG0_TRIGGER_UTX0 15 -# define DMA_CFG0_TRIGGER_URX1 16 -# define DMA_CFG0_TRIGGER_UTX1 17 -# define DMA_CFG0_TRIGGER_FLASH 18 -# define DMA_CFG0_TRIGGER_RADIO 19 -# define DMA_CFG0_TRIGGER_ADC_CHALL 20 -# define DMA_CFG0_TRIGGER_ADC_CH0 21 -# define DMA_CFG0_TRIGGER_ADC_CH1 22 -# define DMA_CFG0_TRIGGER_ADC_CH2 23 -# define DMA_CFG0_TRIGGER_ADC_CH3 24 -# define DMA_CFG0_TRIGGER_ADC_CH4 25 -# define DMA_CFG0_TRIGGER_ADC_CH5 26 -# define DMA_CFG0_TRIGGER_ADC_CH6 27 -# define DMA_CFG0_TRIGGER_I2SRX 27 -# define DMA_CFG0_TRIGGER_ADC_CH7 28 -# define DMA_CFG0_TRIGGER_I2STX 28 -# define DMA_CFG0_TRIGGER_ENC_DW 29 -# define DMA_CFG0_TRIGGER_DNC_UP 30 - -# define DMA_CFG1_SRCINC_MASK (3 << 6) -# define DMA_CFG1_SRCINC_0 (0 << 6) -# define DMA_CFG1_SRCINC_1 (1 << 6) -# define DMA_CFG1_SRCINC_2 (2 << 6) -# define DMA_CFG1_SRCINC_MINUS_1 (3 << 6) - -# define DMA_CFG1_DESTINC_MASK (3 << 4) -# define DMA_CFG1_DESTINC_0 (0 << 4) -# define DMA_CFG1_DESTINC_1 (1 << 4) -# define DMA_CFG1_DESTINC_2 (2 << 4) -# define DMA_CFG1_DESTINC_MINUS_1 (3 << 4) - -# define DMA_CFG1_IRQMASK (1 << 3) -# define DMA_CFG1_M8 (1 << 2) - -# define DMA_CFG1_PRIORITY_MASK (3 << 0) -# define DMA_CFG1_PRIORITY_LOW (0 << 0) -# define DMA_CFG1_PRIORITY_NORMAL (1 << 0) -# define DMA_CFG1_PRIORITY_HIGH (2 << 0) - -/* - * DMAARM - DMA Channel Arm - */ - -sfr at 0xD6 DMAARM; - -# define DMAARM_ABORT (1 << 7) -# define DMAARM_DMAARM4 (1 << 4) -# define DMAARM_DMAARM3 (1 << 3) -# define DMAARM_DMAARM2 (1 << 2) -# define DMAARM_DMAARM1 (1 << 1) -# define DMAARM_DMAARM0 (1 << 0) - -/* - * DMAREQ - DMA Channel Start Request and Status - */ - -sfr at 0xD7 DMAREQ; - -# define DMAREQ_DMAREQ4 (1 << 4) -# define DMAREQ_DMAREQ3 (1 << 3) -# define DMAREQ_DMAREQ2 (1 << 2) -# define DMAREQ_DMAREQ1 (1 << 1) -# define DMAREQ_DMAREQ0 (1 << 0) - -/* - * DMA configuration 0 address - */ - -sfr at 0xD5 DMA0CFGH; -sfr at 0xD4 DMA0CFGL; - -/* - * DMA configuration 1-4 address - */ - -sfr at 0xD3 DMA1CFGH; -sfr at 0xD2 DMA1CFGL; - -/* - * DMAIRQ - DMA Interrupt Flag - */ - -sfr at 0xD1 DMAIRQ; - -# define DMAIRQ_DMAIF4 (1 << 4) -# define DMAIRQ_DMAIF3 (1 << 3) -# define DMAIRQ_DMAIF2 (1 << 2) -# define DMAIRQ_DMAIF1 (1 << 1) -# define DMAIRQ_DMAIF0 (1 << 0) - -struct cc_dma_channel { - uint8_t src_high; - uint8_t src_low; - uint8_t dst_high; - uint8_t dst_low; - uint8_t len_high; - uint8_t len_low; - uint8_t cfg0; - uint8_t cfg1; -}; - -/* - * ADC Data register, low and high - */ -sfr at 0xBA ADCL; -sfr at 0xBB ADCH; -__xdata __at (0xDFBA) volatile uint16_t ADCXDATA; - -/* - * ADC Control Register 1 - */ -sfr at 0xB4 ADCCON1; - -# define ADCCON1_EOC (1 << 7) /* conversion complete */ -# define ADCCON1_ST (1 << 6) /* start conversion */ - -# define ADCCON1_STSEL_MASK (3 << 4) /* start select */ -# define ADCCON1_STSEL_EXTERNAL (0 << 4) /* P2_0 pin triggers */ -# define ADCCON1_STSEL_FULLSPEED (1 << 4) /* full speed, no waiting */ -# define ADCCON1_STSEL_TIMER1 (2 << 4) /* timer 1 channel 0 */ -# define ADCCON1_STSEL_START (3 << 4) /* set start bit */ - -# define ADCCON1_RCTRL_MASK (3 << 2) /* random number control */ -# define ADCCON1_RCTRL_COMPLETE (0 << 2) /* operation completed */ -# define ADCCON1_RCTRL_CLOCK_LFSR (1 << 2) /* Clock the LFSR once */ - -/* - * ADC Control Register 2 - */ -sfr at 0xB5 ADCCON2; - -# define ADCCON2_SREF_MASK (3 << 6) /* reference voltage */ -# define ADCCON2_SREF_1_25V (0 << 6) /* internal 1.25V */ -# define ADCCON2_SREF_EXTERNAL (1 << 6) /* external on AIN7 cc1110 */ -# define ADCCON2_SREF_VDD (2 << 6) /* VDD on the AVDD pin */ -# define ADCCON2_SREF_EXTERNAL_DIFF (3 << 6) /* external on AIN6-7 cc1110 */ - -# define ADCCON2_SDIV_MASK (3 << 4) /* decimation rate */ -# define ADCCON2_SDIV_64 (0 << 4) /* 7 bits */ -# define ADCCON2_SDIV_128 (1 << 4) /* 9 bits */ -# define ADCCON2_SDIV_256 (2 << 4) /* 10 bits */ -# define ADCCON2_SDIV_512 (3 << 4) /* 12 bits */ - -# define ADCCON2_SCH_MASK (0xf << 0) /* Sequence channel select */ -# define ADCCON2_SCH_SHIFT 0 -# define ADCCON2_SCH_AIN0 (0 << 0) -# define ADCCON2_SCH_AIN1 (1 << 0) -# define ADCCON2_SCH_AIN2 (2 << 0) -# define ADCCON2_SCH_AIN3 (3 << 0) -# define ADCCON2_SCH_AIN4 (4 << 0) -# define ADCCON2_SCH_AIN5 (5 << 0) -# define ADCCON2_SCH_AIN6 (6 << 0) -# define ADCCON2_SCH_AIN7 (7 << 0) -# define ADCCON2_SCH_AIN0_AIN1 (8 << 0) -# define ADCCON2_SCH_AIN2_AIN3 (9 << 0) -# define ADCCON2_SCH_AIN4_AIN5 (0xa << 0) -# define ADCCON2_SCH_AIN6_AIN7 (0xb << 0) -# define ADCCON2_SCH_GND (0xc << 0) -# define ADCCON2_SCH_VREF (0xd << 0) -# define ADCCON2_SCH_TEMP (0xe << 0) -# define ADCCON2_SCH_VDD_3 (0xf << 0) - - -/* - * ADC Control Register 3 - */ - -sfr at 0xB6 ADCCON3; - -# define ADCCON3_EREF_MASK (3 << 6) /* extra conversion reference */ -# define ADCCON3_EREF_1_25 (0 << 6) /* internal 1.25V */ -# define ADCCON3_EREF_EXTERNAL (1 << 6) /* external AIN7 cc1110 */ -# define ADCCON3_EREF_VDD (2 << 6) /* VDD on the AVDD pin */ -# define ADCCON3_EREF_EXTERNAL_DIFF (3 << 6) /* external AIN6-7 cc1110 */ -# define ADCCON2_EDIV_MASK (3 << 4) /* extral decimation */ -# define ADCCON2_EDIV_64 (0 << 4) /* 7 bits */ -# define ADCCON2_EDIV_128 (1 << 4) /* 9 bits */ -# define ADCCON2_EDIV_256 (2 << 4) /* 10 bits */ -# define ADCCON2_EDIV_512 (3 << 4) /* 12 bits */ -# define ADCCON3_ECH_MASK (0xf << 0) /* Sequence channel select */ -# define ADCCON3_ECH_SHIFT 0 -# define ADCCON3_ECH_AIN0 (0 << 0) -# define ADCCON3_ECH_AIN1 (1 << 0) -# define ADCCON3_ECH_AIN2 (2 << 0) -# define ADCCON3_ECH_AIN3 (3 << 0) -# define ADCCON3_ECH_AIN4 (4 << 0) -# define ADCCON3_ECH_AIN5 (5 << 0) -# define ADCCON3_ECH_AIN6 (6 << 0) -# define ADCCON3_ECH_AIN7 (7 << 0) -# define ADCCON3_ECH_AIN0_AIN1 (8 << 0) -# define ADCCON3_ECH_AIN2_AIN3 (9 << 0) -# define ADCCON3_ECH_AIN4_AIN5 (0xa << 0) -# define ADCCON3_ECH_AIN6_AIN7 (0xb << 0) -# define ADCCON3_ECH_GND (0xc << 0) -# define ADCCON3_ECH_VREF (0xd << 0) -# define ADCCON3_ECH_TEMP (0xe << 0) -# define ADCCON3_ECH_VDD_3 (0xf << 0) - -sfr at 0xF2 ADCCFG; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - unsigned char j = 0; - - n++; - while (--n != 0) - while (--i != 0) - while (--j != 0) - nop(); -} - -void -debug_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - DEBUG = byte & 1; - delay(5); - byte >>= 1; - } -} - -struct cc_dma_channel __xdata dma_config; - -#define ADC_LEN 6 - -uint16_t __xdata adc_output[ADC_LEN]; - -#define ADDRH(a) (((uint16_t) (a)) >> 8) -#define ADDRL(a) (((uint16_t) (a))) - -void -adc_init(void) -{ - dma_config.cfg0 = (DMA_CFG0_WORDSIZE_16 | - DMA_CFG0_TMODE_REPEATED_SINGLE | - DMA_CFG0_TRIGGER_ADC_CHALL); - dma_config.cfg1 = (DMA_CFG1_SRCINC_0 | - DMA_CFG1_DESTINC_1 | - DMA_CFG1_PRIORITY_NORMAL); - - dma_config.src_high = ADDRH(&ADCXDATA); - dma_config.src_low = ADDRL(&ADCXDATA); - dma_config.dst_high = ADDRH(adc_output); - dma_config.dst_low = ADDRL(adc_output); - dma_config.len_high = 0; - dma_config.len_low = ADC_LEN; - DMA0CFGH = ADDRH(&dma_config); - DMA0CFGL = ADDRL(&dma_config); - ADCCFG = ((1 << 0) | /* acceleration */ - (1 << 1) | /* pressure */ - (1 << 2) | /* temperature */ - (1 << 3) | /* battery voltage */ - (1 << 4) | /* drogue sense */ - (1 << 5)); /* main sense */ - - ADCCON1 = (ADCCON1_STSEL_START); /* ST bit triggers */ - ADCCON2 = (ADCCON2_SREF_VDD | /* reference voltage is VDD */ - ADCCON2_SDIV_512 | /* 12 bit ADC results */ - ADCCON2_SCH_AIN5); /* sample all 6 inputs */ -} - -void -adc_run(void) -{ - DMAIRQ &= ~1; - DMAARM |= 1; - ADCCON1 |= ADCCON1_ST; - while ((DMAIRQ & 1) == 0) - ; -} - -main () -{ - int i; - P1DIR |= 2; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - while (P1 & 0x4) - ; - - adc_init(); - for (;;) { - adc_run(); - for (i = 0; i < ADC_LEN; i++) - debug_byte(adc_output[i]); - } -} diff --git a/target/beep-timer/Makefile b/target/beep-timer/Makefile deleted file mode 100644 index 008adbd5..00000000 --- a/target/beep-timer/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -PROG=beep_timer -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=$(PROG).c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=$(PROG)-flash.ihx $(PROG)-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -$(PROG)-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o $(PROG)-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o $(PROG)-flash.ihx $(REL) - -$(PROG)-flash.ihx: $(PROG)-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/beep-timer/beep_timer.c b/target/beep-timer/beep_timer.c deleted file mode 100644 index b3fa8754..00000000 --- a/target/beep-timer/beep_timer.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -sfr at 0xF1 PERCFG; -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -#define P2SEL_PRI3P1_USART0 (0 << 6) -#define P2SEL_PRI3P1_USART1 (1 << 6) -#define P2SEL_PRI2P1_USART1 (0 << 5) -#define P2SEL_PRI2P1_TIMER3 (1 << 5) -#define P2SEL_PRI1P1_TIMER1 (0 << 4) -#define P2SEL_PRI1P1_TIMER4 (1 << 4) -#define P2SEL_PRI0P1_USART0 (0 << 3) -#define P2SEL_PRI0P1_TIMER1 (1 << 3) -#define P2SEL_SELP2_4_GPIO (0 << 2) -#define P2SEL_SELP2_4_PERIPHERAL (1 << 2) -#define P2SEL_SELP2_3_GPIO (0 << 1) -#define P2SEL_SELP2_3_PERIPHERAL (1 << 1) -#define P2SEL_SELP2_0_GPIO (0 << 0) -#define P2SEL_SELP2_0_PERIPHERAL (1 << 0) - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -/* Timer count */ -sfr at 0xCA T3CNT; -sfr at 0xEA T4CNT; - -/* Timer control */ - -sfr at 0xCB T3CTL; -sfr at 0xEB T4CTL; - -#define TxCTL_DIV_1 (0 << 5) -#define TxCTL_DIV_2 (1 << 5) -#define TxCTL_DIV_4 (2 << 5) -#define TxCTL_DIV_8 (3 << 5) -#define TxCTL_DIV_16 (4 << 5) -#define TxCTL_DIV_32 (5 << 5) -#define TxCTL_DIV_64 (6 << 5) -#define TxCTL_DIV_128 (7 << 5) -#define TxCTL_START (1 << 4) -#define TxCTL_OVFIM (1 << 3) -#define TxCTL_CLR (1 << 2) -#define TxCTL_MODE_FREE (0 << 0) -#define TxCTL_MODE_DOWN (1 << 0) -#define TxCTL_MODE_MODULO (2 << 0) -#define TxCTL_MODE_UP_DOWN (3 << 0) - -/* Timer 4 channel 0 compare control */ - -sfr at 0xCC T3CCTL0; -sfr at 0xCE T3CCTL1; -sfr at 0xEC T4CCTL0; -sfr at 0xEE T4CCTL1; - -#define TxCCTLy_IM (1 << 6) -#define TxCCTLy_CMP_SET (0 << 3) -#define TxCCTLy_CMP_CLEAR (1 << 3) -#define TxCCTLy_CMP_TOGGLE (2 << 3) -#define TxCCTLy_CMP_SET_UP_CLEAR_DOWN (3 << 3) -#define TxCCTLy_CMP_CLEAR_UP_SET_DOWN (4 << 3) -#define TxCCTLy_CMP_SET_CLEAR_FF (5 << 3) -#define TxCCTLy_CMP_CLEAR_SET_00 (6 << 3) -#define TxCCTLy_CMP_MODE_ENABLE (1 << 2) - -/* Timer compare value */ -sfr at 0xCD T3CC0; -sfr at 0xCF T3CC1; -sfr at 0xED T4CC0; -sfr at 0xEF T4CC1; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0, j = 0; - - n <<= 1; - while (--n != 0) - while (--j != 0) - while (--i != 0) - nop(); -} - -void -dit() { - T4CTL |= TxCTL_START; - delay(1); - T4CTL &= ~TxCTL_START; - delay(1); -} - -void -dah () { - T4CTL |= TxCTL_START; - delay(3); - T4CTL &= ~TxCTL_START; - delay(1); -} - -void -charspace () { - delay(2); -} - -void -wordspace () { - delay(8); -} - -#define _ dit(); -#define ___ dah(); -#define C charspace(); -#define W wordspace(); - -main () -{ - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - - /* Use timer 4 alternate config 2 */ - PERCFG = PERCFG_T4CFG_ALT_2; - /* Use P2_4 for timer 4 output */ - P2SEL = P2SEL_SELP2_0_PERIPHERAL; - - T4CCTL0 = TxCCTLy_CMP_TOGGLE|TxCCTLy_CMP_MODE_ENABLE; - T4CC0 = 125; - T4CTL = TxCTL_DIV_32 | TxCTL_MODE_MODULO; - - for (;;) { - ___ _ ___ _ C ___ ___ _ ___ W /* cq */ - ___ _ _ C _ W /* de */ - ___ _ ___ C ___ _ _ C /* kd */ - ___ ___ _ _ _ C _ _ _ C /* 7s */ - ___ ___ _ ___ C ___ ___ _ W /* qg */ - if (T4CC0 == 94) - T4CC0 = 125; - else - T4CC0 = 94; - } -} diff --git a/target/beep/Makefile b/target/beep/Makefile deleted file mode 100644 index 8f600b4a..00000000 --- a/target/beep/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=beep.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=beep-flash.ihx beep-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -beep-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o beep-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o beep-flash.ihx $(REL) - -beep-flash.ihx: beep-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/beep/beep.c b/target/beep/beep.c deleted file mode 100644 index 09c915b7..00000000 --- a/target/beep/beep.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; - -sfr at 0xF1 PERCFG; -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - - n <<= 1; - while (--n != 0) { - i = 211; - while (--i != 0) - nop(); - } -} - -void -tone (unsigned char n, unsigned char m) -{ - unsigned char i = 0; - while (--m != 0) { - while (--i != 0) { - P2 = 0xff; - delay(n); - P2 = 0xfe; - delay(n); - } - } -} - -void -high() { - tone(1, 2); -} - -void -low() { - tone(2, 1); -} - -main () -{ - CLKCON = 0; - /* Set P2_0 to output */ - P2DIR = 0x01; - P1INP = 0x00; - P2INP = 0x00; - for (;;) { - high(); -/* low(); */ - } -} diff --git a/target/blink/.gitignore b/target/blink/.gitignore deleted file mode 100644 index 40f72de9..00000000 --- a/target/blink/.gitignore +++ /dev/null @@ -1,13 +0,0 @@ -*.ihx -*.adb -*.asm -*.cdb -*.lnk -*.lst -*.map -*.mem -*.rel -*.rst -*.sym -blink-flash -blink-ram diff --git a/target/blink/Makefile b/target/blink/Makefile deleted file mode 100644 index d0112e62..00000000 --- a/target/blink/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=blink.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=blink-flash.ihx blink-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -blink-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o blink-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o blink-flash.ihx $(REL) - -blink-flash.ihx: blink-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/blink/blink.c b/target/blink/blink.c deleted file mode 100644 index 907c82b8..00000000 --- a/target/blink/blink.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; - -sfr at 0xF1 PERCFG; -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0, j = 0; - - n <<= 1; - while (--n != 0) - while (--j != 0) - while (--i != 0) - nop(); -} - -void -dit() { - P1 = 0xff; - delay(1); - P1 = 0xfd; - delay(1); -} - -void -dah () { - P1 = 0xff; - delay(3); - P1 = 0xfd; - delay(1); -} - -void -charspace () { - delay(2); -} - -void -wordspace () { - delay(8); -} - -#define _ dit(); -#define ___ dah(); -#define C charspace(); -#define W wordspace(); - -main () -{ - CLKCON = 0; - /* Set p1_1 to output */ - P1DIR = 0x02; - P1INP = 0x00; - P2INP = 0x00; - for (;;) { - ___ _ ___ _ C ___ ___ _ ___ W /* cq */ - ___ _ _ C _ W /* de */ - ___ _ ___ C ___ _ _ C /* kd */ - ___ ___ _ _ _ C _ _ _ C /* 7s */ - ___ ___ _ ___ C ___ ___ _ W /* qg */ - } -} diff --git a/target/dma/Makefile b/target/dma/Makefile deleted file mode 100644 index 9cb3e327..00000000 --- a/target/dma/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf800 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=dma.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=dma-flash.ihx dma-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -dma-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o dma-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o dma-flash.ihx $(REL) - -dma-flash.ihx: dma-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/dma/dma.c b/target/dma/dma.c deleted file mode 100644 index 1762b658..00000000 --- a/target/dma/dma.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -/* - * Test DMA - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -/* - * UART registers - */ - -sfr at 0x86 U0CSR; -sfr at 0xF8 U1CSR; - -/* - * IRCON2 - */ -sfr at 0xE8 IRCON2; /* CPU Interrupt Flag 5 */ - -sbit at 0xE8 USBIF; /* USB interrupt flag (shared with Port2) */ -sbit at 0xE8 P2IF; /* Port2 interrupt flag (shared with USB) */ -sbit at 0xE9 UTX0IF; /* USART0 TX interrupt flag */ -sbit at 0xEA UTX1IF; /* USART1 TX interrupt flag (shared with I2S TX) */ -sbit at 0xEA I2STXIF; /* I2S TX interrupt flag (shared with USART1 TX) */ -sbit at 0xEB P1IF; /* Port1 interrupt flag */ -sbit at 0xEC WDTIF; /* Watchdog timer interrupt flag */ - -# define UxCSR_MODE_UART (1 << 7) -# define UxCSR_MODE_SPI (0 << 7) -# define UxCSR_RE (1 << 6) -# define UxCSR_SLAVE (1 << 5) -# define UxCSR_MASTER (0 << 5) -# define UxCSR_FE (1 << 4) -# define UxCSR_ERR (1 << 3) -# define UxCSR_RX_BYTE (1 << 2) -# define UxCSR_TX_BYTE (1 << 1) -# define UxCSR_ACTIVE (1 << 0) - -sfr at 0xc4 U0UCR; -sfr at 0xfb U1UCR; - -# define UxUCR_FLUSH (1 << 7) -# define UxUCR_FLOW_DISABLE (0 << 6) -# define UxUCR_FLOW_ENABLE (1 << 6) -# define UxUCR_D9_EVEN_PARITY (0 << 5) -# define UxUCR_D9_ODD_PARITY (1 << 5) -# define UxUCR_BIT9_8_BITS (0 << 4) -# define UxUCR_BIT9_9_BITS (1 << 4) -# define UxUCR_PARITY_DISABLE (0 << 3) -# define UxUCR_PARITY_ENABLE (1 << 3) -# define UxUCR_SPB_1_STOP_BIT (0 << 2) -# define UxUCR_SPB_2_STOP_BITS (1 << 2) -# define UxUCR_STOP_LOW (0 << 1) -# define UxUCR_STOP_HIGH (1 << 1) -# define UxUCR_START_LOW (0 << 0) -# define UxUCR_START_HIGH (1 << 0) - -sfr at 0xc5 U0GCR; -sfr at 0xfc U1GCR; - -# define UxGCR_CPOL_NEGATIVE (0 << 7) -# define UxGCR_CPOL_POSITIVE (1 << 7) -# define UxGCR_CPHA_FIRST_EDGE (0 << 6) -# define UxGCR_CPHA_SECOND_EDGE (1 << 6) -# define UxGCR_ORDER_LSB (0 << 5) -# define UxGCR_ORDER_MSB (1 << 5) -# define UxGCR_BAUD_E_MASK (0x1f) -# define UxGCR_BAUD_E_SHIFT 0 - -sfr at 0xc1 U0DBUF; -sfr at 0xf9 U1DBUF; -sfr at 0xc2 U0BAUD; -sfr at 0xfa U1BAUD; - -#define DEBUG P1_1 - - -# define DMA_LEN_HIGH_VLEN_MASK (7 << 5) -# define DMA_LEN_HIGH_VLEN_LEN (0 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_1 (1 << 5) -# define DMA_LEN_HIGH_VLEN (2 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_2 (3 << 5) -# define DMA_LEN_HIGH_VLEN_PLUS_3 (4 << 5) -# define DMA_LEN_HIGH_MASK (0x1f) - -# define DMA_CFG0_WORDSIZE_8 (0 << 7) -# define DMA_CFG0_WORDSIZE_16 (1 << 7) -# define DMA_CFG0_TMODE_MASK (3 << 5) -# define DMA_CFG0_TMODE_SINGLE (0 << 5) -# define DMA_CFG0_TMODE_BLOCK (1 << 5) -# define DMA_CFG0_TMODE_REPEATED_SINGLE (2 << 5) -# define DMA_CFG0_TMODE_REPEATED_BLOCK (3 << 5) - -/* - * DMA triggers - */ -# define DMA_CFG0_TRIGGER_NONE 0 -# define DMA_CFG0_TRIGGER_PREV 1 -# define DMA_CFG0_TRIGGER_T1_CH0 2 -# define DMA_CFG0_TRIGGER_T1_CH1 3 -# define DMA_CFG0_TRIGGER_T1_CH2 4 -# define DMA_CFG0_TRIGGER_T2_OVFL 6 -# define DMA_CFG0_TRIGGER_T3_CH0 7 -# define DMA_CFG0_TRIGGER_T3_CH1 8 -# define DMA_CFG0_TRIGGER_T4_CH0 9 -# define DMA_CFG0_TRIGGER_T4_CH1 10 -# define DMA_CFG0_TRIGGER_IOC_0 12 -# define DMA_CFG0_TRIGGER_IOC_1 13 -# define DMA_CFG0_TRIGGER_URX0 14 -# define DMA_CFG0_TRIGGER_UTX0 15 -# define DMA_CFG0_TRIGGER_URX1 16 -# define DMA_CFG0_TRIGGER_UTX1 17 -# define DMA_CFG0_TRIGGER_FLASH 18 -# define DMA_CFG0_TRIGGER_RADIO 19 -# define DMA_CFG0_TRIGGER_ADC_CHALL 20 -# define DMA_CFG0_TRIGGER_ADC_CH0 21 -# define DMA_CFG0_TRIGGER_ADC_CH1 22 -# define DMA_CFG0_TRIGGER_ADC_CH2 23 -# define DMA_CFG0_TRIGGER_ADC_CH3 24 -# define DMA_CFG0_TRIGGER_ADC_CH4 25 -# define DMA_CFG0_TRIGGER_ADC_CH5 26 -# define DMA_CFG0_TRIGGER_ADC_CH6 27 -# define DMA_CFG0_TRIGGER_I2SRX 27 -# define DMA_CFG0_TRIGGER_ADC_CH7 28 -# define DMA_CFG0_TRIGGER_I2STX 28 -# define DMA_CFG0_TRIGGER_ENC_DW 29 -# define DMA_CFG0_TRIGGER_DNC_UP 30 - -# define DMA_CFG1_SRCINC_MASK (3 << 6) -# define DMA_CFG1_SRCINC_0 (0 << 6) -# define DMA_CFG1_SRCINC_1 (1 << 6) -# define DMA_CFG1_SRCINC_2 (2 << 6) -# define DMA_CFG1_SRCINC_MINUS_1 (3 << 6) - -# define DMA_CFG1_DESTINC_MASK (3 << 4) -# define DMA_CFG1_DESTINC_0 (0 << 4) -# define DMA_CFG1_DESTINC_1 (1 << 4) -# define DMA_CFG1_DESTINC_2 (2 << 4) -# define DMA_CFG1_DESTINC_MINUS_1 (3 << 4) - -# define DMA_CFG1_IRQMASK (1 << 3) -# define DMA_CFG1_M8 (1 << 2) - -# define DMA_CFG1_PRIORITY_MASK (3 << 0) -# define DMA_CFG1_PRIORITY_LOW (0 << 0) -# define DMA_CFG1_PRIORITY_NORMAL (1 << 0) -# define DMA_CFG1_PRIORITY_HIGH (2 << 0) - -/* - * DMAARM - DMA Channel Arm - */ - -sfr at 0xD6 DMAARM; - -# define DMAARM_ABORT (1 << 7) -# define DMAARM_DMAARM4 (1 << 4) -# define DMAARM_DMAARM3 (1 << 3) -# define DMAARM_DMAARM2 (1 << 2) -# define DMAARM_DMAARM1 (1 << 1) -# define DMAARM_DMAARM0 (1 << 0) - -/* - * DMAREQ - DMA Channel Start Request and Status - */ - -sfr at 0xD7 DMAREQ; - -# define DMAREQ_DMAREQ4 (1 << 4) -# define DMAREQ_DMAREQ3 (1 << 3) -# define DMAREQ_DMAREQ2 (1 << 2) -# define DMAREQ_DMAREQ1 (1 << 1) -# define DMAREQ_DMAREQ0 (1 << 0) - -/* - * DMA configuration 0 address - */ - -sfr at 0xD5 DMA0CFGH; -sfr at 0xD4 DMA0CFGL; - -/* - * DMA configuration 1-4 address - */ - -sfr at 0xD3 DMA1CFGH; -sfr at 0xD2 DMA1CFGL; - -/* - * DMAIRQ - DMA Interrupt Flag - */ - -sfr at 0xD1 DMAIRQ; - -# define DMAIRQ_DMAIF4 (1 << 4) -# define DMAIRQ_DMAIF3 (1 << 3) -# define DMAIRQ_DMAIF2 (1 << 2) -# define DMAIRQ_DMAIF1 (1 << 1) -# define DMAIRQ_DMAIF0 (1 << 0) - -struct cc_dma_channel { - uint8_t src_high; - uint8_t src_low; - uint8_t dst_high; - uint8_t dst_low; - uint8_t len_high; - uint8_t len_low; - uint8_t cfg0; - uint8_t cfg1; -}; - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - unsigned char j = 0; - - n++; - while (--n != 0) - while (--i != 0) - while (--j != 0) - nop(); -} - -void -debug_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - DEBUG = byte & 1; - delay(5); - byte >>= 1; - } -} - -struct cc_dma_channel __xdata config; - -#define DMA_LEN 8 - -uint8_t __xdata dma_input[DMA_LEN]; -uint8_t __xdata dma_output[DMA_LEN]; - -#define ADDRH(a) (((uint16_t) (a)) >> 8) -#define ADDRL(a) (((uint16_t) (a))) - -void -dma_init(void) -{ - int i; - config.cfg0 = (DMA_CFG0_WORDSIZE_8 | - DMA_CFG0_TMODE_BLOCK | - DMA_CFG0_TRIGGER_NONE); - config.cfg1 = (DMA_CFG1_SRCINC_1 | - DMA_CFG1_DESTINC_1 | - DMA_CFG1_PRIORITY_NORMAL); - - config.src_high = ADDRH(dma_input); - config.src_low = ADDRL(dma_input); - config.dst_high = ADDRH(dma_output); - config.dst_low = ADDRL(dma_output); - config.len_high = 0; - config.len_low = DMA_LEN; - DMA0CFGH = ADDRH(&config); - DMA0CFGL = ADDRL(&config); - for (i = 0; i < DMA_LEN; i++) - dma_input[i] = i + 1; -} - -void -dma_run(void) -{ - DMAREQ |= 1; - DMAARM |= 1; - while (DMAARM & 1) - ; -} - -main () -{ - int i; - P1DIR |= 2; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - - dma_init(); - dma_run(); - for (;;) { - for (i = 0; i < DMA_LEN; i++) - debug_byte(dma_output[i]); - } -} diff --git a/target/ee/Makefile b/target/ee/Makefile deleted file mode 100644 index 4c9abd1f..00000000 --- a/target/ee/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf800 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=ee.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=ee-flash.ihx ee-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -ee-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o ee-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o ee-flash.ihx $(REL) - -ee-flash.ihx: ee-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/ee/ee.c b/target/ee/ee.c deleted file mode 100644 index 9ea22cdc..00000000 --- a/target/ee/ee.c +++ /dev/null @@ -1,407 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -/* - * Validate the SPI-connected EEPROM - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -/* - * UART registers - */ - -sfr at 0x86 U0CSR; -sfr at 0xF8 U1CSR; - -# define UxCSR_MODE_UART (1 << 7) -# define UxCSR_MODE_SPI (0 << 7) -# define UxCSR_RE (1 << 6) -# define UxCSR_SLAVE (1 << 5) -# define UxCSR_MASTER (0 << 5) -# define UxCSR_FE (1 << 4) -# define UxCSR_ERR (1 << 3) -# define UxCSR_RX_BYTE (1 << 2) -# define UxCSR_TX_BYTE (1 << 1) -# define UxCSR_ACTIVE (1 << 0) - -sfr at 0xc4 U0UCR; -sfr at 0xfb U1UCR; - -sfr at 0xc5 U0GCR; -sfr at 0xfc U1GCR; - -# define UxGCR_CPOL_NEGATIVE (0 << 7) -# define UxGCR_CPOL_POSITIVE (1 << 7) -# define UxGCR_CPHA_FIRST_EDGE (0 << 6) -# define UxGCR_CPHA_SECOND_EDGE (1 << 6) -# define UxGCR_ORDER_LSB (0 << 5) -# define UxGCR_ORDER_MSB (1 << 5) -# define UxGCR_BAUD_E_MASK (0x1f) -# define UxGCR_BAUD_E_SHIFT 0 - -sfr at 0xc1 U0DBUF; -sfr at 0xf9 U1DBUF; -sfr at 0xc2 U0BAUD; -sfr at 0xfa U1BAUD; - -#define MOSI P1_5 -#define MISO P1_4 -#define SCK P1_3 -#define CS P1_2 - -#define DEBUG P1_1 - -#define BITBANG 0 -#define USART 1 - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - unsigned char j = 0; - - while (--n != 0) - while (--i != 0) - while (--j != 0) - nop(); -} - -#if BITBANG - -/* - * This version directly manipulates the GPIOs to synthesize SPI - */ - -void -bitbang_cs(uint8_t b) -{ - SCK = 0; - CS = b; - delay(1); -} - -void -bitbang_out_bit(uint8_t b) -{ - MOSI = b; - delay(1); - SCK = 1; - delay(1); - SCK = 0; -} - -void -bitbang_out_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - uint8_t b = (byte & 0x80) ? 1 : 0; - bitbang_out_bit(b); - byte <<= 1; - } -} - -uint8_t -bitbang_in_bit(void) -{ - uint8_t b; - - delay(1); - SCK = 1; - delay(1); - b = MISO; - SCK = 0; - return b; -} - -uint8_t -bitbang_in_byte(void) -{ - uint8_t byte = 0; - uint8_t s; - uint8_t b; - - for (s = 0; s < 8; s++) { - b = bitbang_in_bit(); - byte = byte << 1; - byte |= b; - } - return byte; -} - -void -bit_bang_init(void) -{ - CS = 1; - SCK = 0; - P1DIR = ((1 << 5) | - (0 << 4) | - (1 << 3) | - (1 << 2) | - (1 << 1)); -} - -#define spi_init() bitbang_init() -#define spi_out_byte(b) bitbang_out_byte(b) -#define spi_in_byte() bitbang_in_byte() -#define spi_cs(b) bitbang_cs(b) -#endif - -#if USART - -/* - * This version uses the USART in SPI mode - */ -void -usart_init(void) -{ - /* - * Configure our chip select line - */ - CS = 1; - P1DIR |= (1 << 2); - /* - * Configure the peripheral pin choices - * for both of the serial ports - * - * Note that telemetrum will use U1CFG_ALT_2 - * but that overlaps with SPI ALT_2, so until - * we can test that this works, we'll set this - * to ALT_1 - */ - PERCFG = (PERCFG_U1CFG_ALT_1 | - PERCFG_U0CFG_ALT_2); - - /* - * Make the SPI pins controlled by the SPI - * hardware - */ - P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3)); - - /* - * SPI in master mode - */ - U0CSR = (UxCSR_MODE_SPI | - UxCSR_MASTER); - - /* - * The cc1111 is limited to a 24/8 MHz SPI clock, - * while the 25LC1024 is limited to 20MHz. So, - * use the 3MHz clock (BAUD_E 17, BAUD_M 0) - */ - U0BAUD = 0; - U0GCR = (UxGCR_CPOL_NEGATIVE | - UxGCR_CPHA_FIRST_EDGE | - UxGCR_ORDER_MSB | - (17 << UxGCR_BAUD_E_SHIFT)); -} - -void -usart_cs(uint8_t b) -{ - CS = b; -} - -uint8_t -usart_in_out(uint8_t byte) -{ - U0DBUF = byte; - while ((U0CSR & UxCSR_TX_BYTE) == 0) - ; - U0CSR &= ~UxCSR_TX_BYTE; - return U0DBUF; -} - -void -usart_out_byte(uint8_t byte) -{ - (void) usart_in_out(byte); -} - -uint8_t -usart_in_byte(void) -{ - return usart_in_out(0xff); -} - -#define spi_init() usart_init() -#define spi_out_byte(b) usart_out_byte(b) -#define spi_in_byte() usart_in_byte() -#define spi_cs(b) usart_cs(b) - -#endif - -uint8_t -rdsr(void) -{ - uint8_t status; - spi_cs(0); - spi_out_byte(0x05); - status = spi_in_byte(); - spi_cs(1); - return status; -} - -void -wrsr(uint8_t status) -{ - spi_cs(0); - spi_out_byte(0x01); - spi_out_byte(status); - spi_cs(1); -} - -void -wren(void) -{ - spi_cs(0); - spi_out_byte(0x06); - spi_cs(1); -} - -void -write(uint32_t addr, uint8_t *bytes, uint16_t len) -{ - wren(); - spi_cs(0); - spi_out_byte(0x02); - spi_out_byte(addr >> 16); - spi_out_byte(addr >> 8); - spi_out_byte(addr); - while (len-- > 0) - spi_out_byte(*bytes++); - spi_cs(1); - for (;;) { - uint8_t status = rdsr(); - if ((status & (1 << 0)) == 0) - break; - } -} - -void -read(uint32_t addr, uint8_t *bytes, uint16_t len) -{ - spi_cs(0); - spi_out_byte(0x03); - spi_out_byte(addr >> 16); - spi_out_byte(addr >> 8); - spi_out_byte(addr); - while (len-- > 0) - *bytes++ = spi_in_byte(); - spi_cs(1); -} - -void -debug_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - DEBUG = byte & 1; - delay(5); - byte >>= 1; - } -} - -#define STRING "\360\252" -#define LENGTH 2 - -main () -{ - uint8_t status; - uint8_t buf[LENGTH]; - int i; - - P1DIR |= 2; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - - spi_init(); - - status = rdsr(); - /* - * Turn off both block-protect bits - */ - status &= ~((1 << 3) | (1 << 2)); - /* - * Turn off write protect enable - */ - status &= ~(1 << 7); - wrsr(status); - write(0x0, STRING, LENGTH); - for (;;) { - read(0x0, buf, LENGTH); - for (i = 0; i < LENGTH; i++) - debug_byte(buf[i]); - } -} diff --git a/target/isr.c b/target/isr.c deleted file mode 100644 index ae4d04c5..00000000 --- a/target/isr.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -void rftxrx_isr (void) __interrupt(0) __using(1) -{ -} - -void adc_isr (void) __interrupt(1) __using(1) -{ -} - -void urx0_isr (void) __interrupt(2) __using(1) -{ -} - -void urx1_isr (void) __interrupt(3) __using(1) -{ -} - -void enc_isr (void) __interrupt(4) __using(1) -{ -} - -void st_isr (void) __interrupt(5) __using(1) -{ -} - -void usb_isr (void) __interrupt(6) __using(1) -{ -} - -void utx0_isr (void) __interrupt(7) __using(1) -{ -} - -void dma_isr (void) __interrupt(8) __using(1) -{ -} - -void t1_isr (void) __interrupt(9) __using(1) -{ -} - -void t2_isr (void) __interrupt(10) __using(1) -{ -} - -void t3_isr (void) __interrupt(11) __using(1) -{ -} - -void t4_isr (void) __interrupt(12) __using(1) -{ -} - -void p0int_isr (void) __interrupt(13) __using(1) -{ -} - -void utx1_isr (void) __interrupt(14) __using(1) -{ -} - -void p1int_isr (void) __interrupt(15) __using(1) -{ -} - -void rf_isr (void) __interrupt(16) __using(1) -{ -} - -void wdt_isr (void) __interrupt(17) __using(1) -{ -} diff --git a/target/radio/Makefile b/target/radio/Makefile deleted file mode 100644 index 97706fef..00000000 --- a/target/radio/Makefile +++ /dev/null @@ -1,52 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=xmit.c recv.c init.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=xmit-flash.ihx xmit-ram.ihx recv-flash.ihx recv-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -xmit-ram.ihx: xmit.rel init.rel Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o xmit-ram.ihx xmit.rel init.rel - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o xmit-flash.ihx xmit.rel init.rel - -xmit-flash.ihx: xmit-ram.ihx - -recv-ram.ihx: recv.rel init.rel Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o recv-ram.ihx recv.rel init.rel - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o recv-flash.ihx recv.rel init.rel - -recv-flash.ihx: recv-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/radio/init.c b/target/radio/init.c deleted file mode 100644 index ea7c984c..00000000 --- a/target/radio/init.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Copyright © 2009 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include "radio.h" - -/* Values from SmartRF® Studio for: - * - * Deviation: 20.507812 kHz - * Datarate: 38.360596 kBaud - * Modulation: GFSK - * RF Freq: 434.549927 MHz - * Channel: 99.975586 kHz - * Channel: 0 - * RX filter: 93.75 kHz - */ - -/* - * For 434.550MHz, the frequency value is: - * - * 434.550e6 / (24e6 / 2**16) = 1186611.2 - */ - -#define FREQ_CONTROL 1186611 - -/* - * For IF freq of 140.62kHz, the IF value is: - * - * 140.62e3 / (24e6 / 2**10) = 6 - */ - -#define IF_FREQ_CONTROL 6 - -/* - * For channel bandwidth of 93.75 kHz, the CHANBW_E and CHANBW_M values are - * - * BW = 24e6 / (8 * (4 + M) * 2 ** E) - * - * So, M = 0 and E = 3 - */ - -#define CHANBW_M 0 -#define CHANBW_E 3 - -/* - * For a symbol rate of 38360kBaud, the DRATE_E and DRATE_M values are: - * - * R = (256 + M) * 2** E * 24e6 / 2**28 - * - * So M is 163 and E is 10 - */ - -#define DRATE_E 10 -#define DRATE_M 163 - -/* - * For a channel deviation of 20.5kHz, the DEVIATION_E and DEVIATION_M values are: - * - * F = 24e6/2**17 * (8 + DEVIATION_M) * 2**DEVIATION_E - * - * So M is 6 and E is 3 - */ - -#define DEVIATION_M 6 -#define DEVIATION_E 3 - -#define PACKET_LEN 128 - -/* This are from the table for 433MHz */ - -#define RF_POWER_M30_DBM 0x12 -#define RF_POWER_M20_DBM 0x0e -#define RF_POWER_M15_DBM 0x1d -#define RF_POWER_M10_DBM 0x34 -#define RF_POWER_M5_DBM 0x2c -#define RF_POWER_0_DBM 0x60 -#define RF_POWER_5_DBM 0x84 -#define RF_POWER_7_DBM 0xc8 -#define RF_POWER_10_DBM 0xc0 - -#define RF_POWER RF_POWER_0_DBM - -static __code uint8_t radio_setup[] = { - RF_PA_TABLE7_OFF, RF_POWER, - RF_PA_TABLE6_OFF, RF_POWER, - RF_PA_TABLE5_OFF, RF_POWER, - RF_PA_TABLE4_OFF, RF_POWER, - RF_PA_TABLE3_OFF, RF_POWER, - RF_PA_TABLE2_OFF, RF_POWER, - RF_PA_TABLE1_OFF, RF_POWER, - RF_PA_TABLE0_OFF, RF_POWER, - - RF_FREQ2_OFF, FREQ_CONTROL >> 16, - RF_FREQ1_OFF, FREQ_CONTROL >> 8, - RF_FREQ0_OFF, FREQ_CONTROL >> 0, - - RF_FSCTRL1_OFF, (IF_FREQ_CONTROL << RF_FSCTRL1_FREQ_IF_SHIFT), - RF_FSCTRL0_OFF, (0 << RF_FSCTRL0_FREQOFF_SHIFT), - - RF_MDMCFG4_OFF, ((CHANBW_E << RF_MDMCFG4_CHANBW_E_SHIFT) | - (CHANBW_M << RF_MDMCFG4_CHANBW_M_SHIFT) | - (DRATE_E << RF_MDMCFG4_DRATE_E_SHIFT)), - RF_MDMCFG3_OFF, (DRATE_M << RF_MDMCFG3_DRATE_M_SHIFT), - RF_MDMCFG2_OFF, (RF_MDMCFG2_DEM_DCFILT_OFF | - RF_MDMCFG2_MOD_FORMAT_GFSK | - RF_MDMCFG2_SYNC_MODE_15_16_THRES), - RF_MDMCFG1_OFF, (RF_MDMCFG1_FEC_EN | - RF_MDMCFG1_NUM_PREAMBLE_4 | - (2 << RF_MDMCFG1_CHANSPC_E_SHIFT)), - RF_MDMCFG0_OFF, (17 << RF_MDMCFG0_CHANSPC_M_SHIFT), - - RF_CHANNR_OFF, 0, - - RF_DEVIATN_OFF, ((DEVIATION_E << RF_DEVIATN_DEVIATION_E_SHIFT) | - (DEVIATION_M << RF_DEVIATN_DEVIATION_M_SHIFT)), - - /* SmartRF says set LODIV_BUF_CURRENT_TX to 0 - * And, we're not using power ramping, so use PA_POWER 0 - */ - RF_FREND0_OFF, ((1 << RF_FREND0_LODIV_BUF_CURRENT_TX_SHIFT) | - (0 << RF_FREND0_PA_POWER_SHIFT)), - - RF_FREND1_OFF, ((1 << RF_FREND1_LNA_CURRENT_SHIFT) | - (1 << RF_FREND1_LNA2MIX_CURRENT_SHIFT) | - (1 << RF_FREND1_LODIV_BUF_CURRENT_RX_SHIFT) | - (2 << RF_FREND1_MIX_CURRENT_SHIFT)), - - RF_FSCAL3_OFF, 0xE9, - RF_FSCAL2_OFF, 0x0A, - RF_FSCAL1_OFF, 0x00, - RF_FSCAL0_OFF, 0x1F, - - RF_TEST2_OFF, 0x88, - RF_TEST1_OFF, 0x31, - RF_TEST0_OFF, 0x09, - - /* default sync values */ - RF_SYNC1_OFF, 0xD3, - RF_SYNC0_OFF, 0x91, - - /* max packet length */ - RF_PKTLEN_OFF, PACKET_LEN, - - RF_PKTCTRL1_OFF, ((1 << PKTCTRL1_PQT_SHIFT)| - PKTCTRL1_APPEND_STATUS| - PKTCTRL1_ADR_CHK_NONE), - RF_PKTCTRL0_OFF, (RF_PKTCTRL0_WHITE_DATA| - RF_PKTCTRL0_PKT_FORMAT_NORMAL| - RF_PKTCTRL0_CRC_EN| - RF_PKTCTRL0_LENGTH_CONFIG_FIXED), - RF_ADDR_OFF, 0x00, - RF_MCSM2_OFF, (RF_MCSM2_RX_TIME_END_OF_PACKET), - RF_MCSM1_OFF, (RF_MCSM1_CCA_MODE_RSSI_BELOW_UNLESS_RECEIVING| - RF_MCSM1_RXOFF_MODE_IDLE| - RF_MCSM1_TXOFF_MODE_IDLE), - RF_MCSM0_OFF, (RF_MCSM0_FS_AUTOCAL_FROM_IDLE| - RF_MCSM0_MAGIC_3| - RF_MCSM0_CLOSE_IN_RX_18DB), - RF_FOCCFG_OFF, (RF_FOCCFG_FOC_PRE_K_3K, - RF_FOCCFG_FOC_POST_K_PRE_K, - RF_FOCCFG_FOC_LIMIT_BW_OVER_4), - RF_BSCFG_OFF, (RF_BSCFG_BS_PRE_K_2K| - RF_BSCFG_BS_PRE_KP_3KP| - RF_BSCFG_BS_POST_KI_PRE_KI| - RF_BSCFG_BS_POST_KP_PRE_KP| - RF_BSCFG_BS_LIMIT_0), - RF_AGCCTRL2_OFF, 0x43, - RF_AGCCTRL1_OFF, 0x40, - RF_AGCCTRL0_OFF, 0x91, - - RF_IOCFG2_OFF, 0x00, - RF_IOCFG1_OFF, 0x00, - RF_IOCFG0_OFF, 0x00, -}; - -void -radio_init(void) { - uint8_t i; - for (i = 0; i < sizeof (radio_setup); i += 2) - RF[radio_setup[i]] = radio_setup[i+1]; -} - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - - n <<= 1; - while (--n != 0) - while (--i != 0) - nop(); -} diff --git a/target/radio/radio.h b/target/radio/radio.h deleted file mode 100644 index f68001e4..00000000 --- a/target/radio/radio.h +++ /dev/null @@ -1,435 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -sfr at 0x80 P0; -sfr at 0x90 P1; -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; - -sfr at 0xF1 PERCFG; -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sfr at 0xD9 RFD; -sfr at 0xE9 RFIF; -#define RFIF_IM_TXUNF (1 << 7) -#define RFIF_IM_RXOVF (1 << 6) -#define RFIF_IM_TIMEOUT (1 << 5) -#define RFIF_IM_DONE (1 << 4) -#define RFIF_IM_CS (1 << 3) -#define RFIF_IM_PQT (1 << 2) -#define RFIF_IM_CCA (1 << 1) -#define RFIF_IM_SFD (1 << 0) - -sfr at 0xE1 RFST; - -sfr at 0x88 TCON; - -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sbit at 0x89 RFTXRXIF; - -#define TCON_RFTXRXIF (1 << 1) - -#define RFST_SFSTXON 0x00 -#define RFST_SCAL 0x01 -#define RFST_SRX 0x02 -#define RFST_STX 0x03 -#define RFST_SIDLE 0x04 - -__xdata __at (0xdf00) uint8_t RF[0x3c]; - -__xdata __at (0xdf2f) uint8_t RF_IOCFG2; -#define RF_IOCFG2_OFF 0x2f - -__xdata __at (0xdf30) uint8_t RF_IOCFG1; -#define RF_IOCFG1_OFF 0x30 - -__xdata __at (0xdf31) uint8_t RF_IOCFG0; -#define RF_IOCFG0_OFF 0x31 - -__xdata __at (0xdf00) uint8_t RF_SYNC1; -#define RF_SYNC1_OFF 0x00 - -__xdata __at (0xdf01) uint8_t RF_SYNC0; -#define RF_SYNC0_OFF 0x01 - -__xdata __at (0xdf02) uint8_t RF_PKTLEN; -#define RF_PKTLEN_OFF 0x02 - -__xdata __at (0xdf03) uint8_t RF_PKTCTRL1; -#define RF_PKTCTRL1_OFF 0x03 -#define PKTCTRL1_PQT_MASK (0x7 << 5) -#define PKTCTRL1_PQT_SHIFT 5 -#define PKTCTRL1_APPEND_STATUS (1 << 2) -#define PKTCTRL1_ADR_CHK_NONE (0 << 0) -#define PKTCTRL1_ADR_CHK_NO_BROADCAST (1 << 0) -#define PKTCTRL1_ADR_CHK_00_BROADCAST (2 << 0) -#define PKTCTRL1_ADR_CHK_00_FF_BROADCAST (3 << 0) - -/* If APPEND_STATUS is used, two bytes will be added to the packet data */ -#define PKT_APPEND_STATUS_0_RSSI_MASK (0xff) -#define PKT_APPEND_STATUS_0_RSSI_SHIFT 0 -#define PKT_APPEND_STATUS_1_CRC_OK (1 << 7) -#define PKT_APPEND_STATUS_1_LQI_MASK (0x7f) -#define PKT_APPEND_STATUS_1_LQI_SHIFT 0 - -__xdata __at (0xdf04) uint8_t RF_PKTCTRL0; -#define RF_PKTCTRL0_OFF 0x04 -#define RF_PKTCTRL0_WHITE_DATA (1 << 6) -#define RF_PKTCTRL0_PKT_FORMAT_NORMAL (0 << 4) -#define RF_PKTCTRL0_PKT_FORMAT_RANDOM (2 << 4) -#define RF_PKTCTRL0_CRC_EN (1 << 2) -#define RF_PKTCTRL0_LENGTH_CONFIG_FIXED (0 << 0) -#define RF_PKTCTRL0_LENGTH_CONFIG_VARIABLE (1 << 0) - -__xdata __at (0xdf05) uint8_t RF_ADDR; -#define RF_ADDR_OFF 0x05 - -__xdata __at (0xdf06) uint8_t RF_CHANNR; -#define RF_CHANNR_OFF 0x06 - -__xdata __at (0xdf07) uint8_t RF_FSCTRL1; -#define RF_FSCTRL1_OFF 0x07 - -#define RF_FSCTRL1_FREQ_IF_SHIFT (0) - -__xdata __at (0xdf08) uint8_t RF_FSCTRL0; -#define RF_FSCTRL0_OFF 0x08 - -#define RF_FSCTRL0_FREQOFF_SHIFT (0) - -__xdata __at (0xdf09) uint8_t RF_FREQ2; -#define RF_FREQ2_OFF 0x09 - -__xdata __at (0xdf0a) uint8_t RF_FREQ1; -#define RF_FREQ1_OFF 0x0a - -__xdata __at (0xdf0b) uint8_t RF_FREQ0; -#define RF_FREQ0_OFF 0x0b - -__xdata __at (0xdf0c) uint8_t RF_MDMCFG4; -#define RF_MDMCFG4_OFF 0x0c - -#define RF_MDMCFG4_CHANBW_E_SHIFT 6 -#define RF_MDMCFG4_CHANBW_M_SHIFT 4 -#define RF_MDMCFG4_DRATE_E_SHIFT 0 - -__xdata __at (0xdf0d) uint8_t RF_MDMCFG3; -#define RF_MDMCFG3_OFF 0x0d - -#define RF_MDMCFG3_DRATE_M_SHIFT 0 - -__xdata __at (0xdf0e) uint8_t RF_MDMCFG2; -#define RF_MDMCFG2_OFF 0x0e - -#define RF_MDMCFG2_DEM_DCFILT_OFF (1 << 7) -#define RF_MDMCFG2_DEM_DCFILT_ON (0 << 7) - -#define RF_MDMCFG2_MOD_FORMAT_MASK (7 << 4) -#define RF_MDMCFG2_MOD_FORMAT_2_FSK (0 << 4) -#define RF_MDMCFG2_MOD_FORMAT_GFSK (1 << 4) -#define RF_MDMCFG2_MOD_FORMAT_ASK_OOK (3 << 4) -#define RF_MDMCFG2_MOD_FORMAT_MSK (7 << 4) - -#define RF_MDMCFG2_MANCHESTER_EN (1 << 3) - -#define RF_MDMCFG2_SYNC_MODE_MASK (0x7 << 0) -#define RF_MDMCFG2_SYNC_MODE_NONE (0x0 << 0) -#define RF_MDMCFG2_SYNC_MODE_15_16 (0x1 << 0) -#define RF_MDMCFG2_SYNC_MODE_16_16 (0x2 << 0) -#define RF_MDMCFG2_SYNC_MODE_30_32 (0x3 << 0) -#define RF_MDMCFG2_SYNC_MODE_NONE_THRES (0x4 << 0) -#define RF_MDMCFG2_SYNC_MODE_15_16_THRES (0x5 << 0) -#define RF_MDMCFG2_SYNC_MODE_16_16_THRES (0x6 << 0) -#define RF_MDMCFG2_SYNC_MODE_30_32_THRES (0x7 << 0) - -__xdata __at (0xdf0f) uint8_t RF_MDMCFG1; -#define RF_MDMCFG1_OFF 0x0f - -#define RF_MDMCFG1_FEC_EN (1 << 7) -#define RF_MDMCFG1_FEC_DIS (0 << 7) - -#define RF_MDMCFG1_NUM_PREAMBLE_MASK (7 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_2 (0 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_3 (1 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_4 (2 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_6 (3 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_8 (4 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_12 (5 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_16 (6 << 4) -#define RF_MDMCFG1_NUM_PREAMBLE_24 (7 << 4) - -#define RF_MDMCFG1_CHANSPC_E_MASK (3 << 0) -#define RF_MDMCFG1_CHANSPC_E_SHIFT (0) - -__xdata __at (0xdf10) uint8_t RF_MDMCFG0; -#define RF_MDMCFG0_OFF 0x10 - -#define RF_MDMCFG0_CHANSPC_M_SHIFT (0) - -__xdata __at (0xdf11) uint8_t RF_DEVIATN; -#define RF_DEVIATN_OFF 0x11 - -#define RF_DEVIATN_DEVIATION_E_SHIFT 4 -#define RF_DEVIATN_DEVIATION_M_SHIFT 0 - -__xdata __at (0xdf12) uint8_t RF_MCSM2; -#define RF_MCSM2_OFF 0x12 -#define RF_MCSM2_RX_TIME_RSSI (1 << 4) -#define RF_MCSM2_RX_TIME_QUAL (1 << 3) -#define RF_MCSM2_RX_TIME_MASK (0x7) -#define RF_MCSM2_RX_TIME_SHIFT 0 -#define RF_MCSM2_RX_TIME_END_OF_PACKET (7) - -__xdata __at (0xdf13) uint8_t RF_MCSM1; -#define RF_MCSM1_OFF 0x13 -#define RF_MCSM1_CCA_MODE_ALWAYS (0 << 4) -#define RF_MCSM1_CCA_MODE_RSSI_BELOW (1 << 4) -#define RF_MCSM1_CCA_MODE_UNLESS_RECEIVING (2 << 4) -#define RF_MCSM1_CCA_MODE_RSSI_BELOW_UNLESS_RECEIVING (3 << 4) -#define RF_MCSM1_RXOFF_MODE_IDLE (0 << 2) -#define RF_MCSM1_RXOFF_MODE_FSTXON (1 << 2) -#define RF_MCSM1_RXOFF_MODE_TX (2 << 2) -#define RF_MCSM1_RXOFF_MODE_RX (3 << 2) -#define RF_MCSM1_TXOFF_MODE_IDLE (0 << 0) -#define RF_MCSM1_TXOFF_MODE_FSTXON (1 << 0) -#define RF_MCSM1_TXOFF_MODE_TX (2 << 0) -#define RF_MCSM1_TXOFF_MODE_RX (3 << 0) - -__xdata __at (0xdf14) uint8_t RF_MCSM0; -#define RF_MCSM0_OFF 0x14 -#define RF_MCSM0_FS_AUTOCAL_NEVER (0 << 4) -#define RF_MCSM0_FS_AUTOCAL_FROM_IDLE (1 << 4) -#define RF_MCSM0_FS_AUTOCAL_TO_IDLE (2 << 4) -#define RF_MCSM0_FS_AUTOCAL_TO_IDLE_EVERY_4 (3 << 4) -#define RF_MCSM0_MAGIC_3 (1 << 3) -#define RF_MCSM0_MAGIC_2 (1 << 2) -#define RF_MCSM0_CLOSE_IN_RX_0DB (0 << 0) -#define RF_MCSM0_CLOSE_IN_RX_6DB (1 << 0) -#define RF_MCSM0_CLOSE_IN_RX_12DB (2 << 0) -#define RF_MCSM0_CLOSE_IN_RX_18DB (3 << 0) - -__xdata __at (0xdf15) uint8_t RF_FOCCFG; -#define RF_FOCCFG_OFF 0x15 -#define RF_FOCCFG_FOC_BS_CS_GATE (1 << 5) -#define RF_FOCCFG_FOC_PRE_K_1K (0 << 3) -#define RF_FOCCFG_FOC_PRE_K_2K (1 << 3) -#define RF_FOCCFG_FOC_PRE_K_3K (2 << 3) -#define RF_FOCCFG_FOC_PRE_K_4K (3 << 3) -#define RF_FOCCFG_FOC_POST_K_PRE_K (0 << 2) -#define RF_FOCCFG_FOC_POST_K_PRE_K_OVER_2 (1 << 2) -#define RF_FOCCFG_FOC_LIMIT_0 (0 << 0) -#define RF_FOCCFG_FOC_LIMIT_BW_OVER_8 (1 << 0) -#define RF_FOCCFG_FOC_LIMIT_BW_OVER_4 (2 << 0) -#define RF_FOCCFG_FOC_LIMIT_BW_OVER_2 (3 << 0) - -__xdata __at (0xdf16) uint8_t RF_BSCFG; -#define RF_BSCFG_OFF 0x16 -#define RF_BSCFG_BS_PRE_K_1K (0 << 6) -#define RF_BSCFG_BS_PRE_K_2K (1 << 6) -#define RF_BSCFG_BS_PRE_K_3K (2 << 6) -#define RF_BSCFG_BS_PRE_K_4K (3 << 6) -#define RF_BSCFG_BS_PRE_KP_1KP (0 << 4) -#define RF_BSCFG_BS_PRE_KP_2KP (1 << 4) -#define RF_BSCFG_BS_PRE_KP_3KP (2 << 4) -#define RF_BSCFG_BS_PRE_KP_4KP (3 << 4) -#define RF_BSCFG_BS_POST_KI_PRE_KI (0 << 3) -#define RF_BSCFG_BS_POST_KI_PRE_KI_OVER_2 (1 << 3) -#define RF_BSCFG_BS_POST_KP_PRE_KP (0 << 2) -#define RF_BSCFG_BS_POST_KP_PRE_KP_OVER_2 (1 << 2) -#define RF_BSCFG_BS_LIMIT_0 (0 << 0) -#define RF_BSCFG_BS_LIMIT_3_125 (1 << 0) -#define RF_BSCFG_BS_LIMIT_6_25 (2 << 0) -#define RF_BSCFG_BS_LIMIT_12_5 (3 << 0) - -__xdata __at (0xdf17) uint8_t RF_AGCCTRL2; -#define RF_AGCCTRL2_OFF 0x17 - -__xdata __at (0xdf18) uint8_t RF_AGCCTRL1; -#define RF_AGCCTRL1_OFF 0x18 - -__xdata __at (0xdf19) uint8_t RF_AGCCTRL0; -#define RF_AGCCTRL0_OFF 0x19 - -__xdata __at (0xdf1a) uint8_t RF_FREND1; -#define RF_FREND1_OFF 0x1a - -#define RF_FREND1_LNA_CURRENT_SHIFT 6 -#define RF_FREND1_LNA2MIX_CURRENT_SHIFT 4 -#define RF_FREND1_LODIV_BUF_CURRENT_RX_SHIFT 2 -#define RF_FREND1_MIX_CURRENT_SHIFT 0 - -__xdata __at (0xdf1b) uint8_t RF_FREND0; -#define RF_FREND0_OFF 0x1b - -#define RF_FREND0_LODIV_BUF_CURRENT_TX_MASK (0x3 << 4) -#define RF_FREND0_LODIV_BUF_CURRENT_TX_SHIFT 4 -#define RF_FREND0_PA_POWER_MASK (0x7) -#define RF_FREND0_PA_POWER_SHIFT 0 - -__xdata __at (0xdf1c) uint8_t RF_FSCAL3; -#define RF_FSCAL3_OFF 0x1c - -__xdata __at (0xdf1d) uint8_t RF_FSCAL2; -#define RF_FSCAL2_OFF 0x1d - -__xdata __at (0xdf1e) uint8_t RF_FSCAL1; -#define RF_FSCAL1_OFF 0x1e - -__xdata __at (0xdf1f) uint8_t RF_FSCAL0; -#define RF_FSCAL0_OFF 0x1f - -__xdata __at (0xdf23) uint8_t RF_TEST2; -#define RF_TEST2_OFF 0x23 - -#define RF_TEST2_NORMAL_MAGIC 0x88 -#define RF_TEST2_RX_LOW_DATA_RATE_MAGIC 0x81 - -__xdata __at (0xdf24) uint8_t RF_TEST1; -#define RF_TEST1_OFF 0x24 - -#define RF_TEST1_TX_MAGIC 0x31 -#define RF_TEST1_RX_LOW_DATA_RATE_MAGIC 0x35 - -__xdata __at (0xdf25) uint8_t RF_TEST0; -#define RF_TEST0_OFF 0x25 - -#define RF_TEST0_7_2_MASK (0xfc) -#define RF_TEST0_VCO_SEL_CAL_EN (1 << 1) -#define RF_TEST0_0_MASK (1) - -/* These are undocumented, and must be computed - * using the provided tool. - */ -__xdata __at (0xdf27) uint8_t RF_PA_TABLE7; -#define RF_PA_TABLE7_OFF 0x27 - -__xdata __at (0xdf28) uint8_t RF_PA_TABLE6; -#define RF_PA_TABLE6_OFF 0x28 - -__xdata __at (0xdf29) uint8_t RF_PA_TABLE5; -#define RF_PA_TABLE5_OFF 0x29 - -__xdata __at (0xdf2a) uint8_t RF_PA_TABLE4; -#define RF_PA_TABLE4_OFF 0x2a - -__xdata __at (0xdf2b) uint8_t RF_PA_TABLE3; -#define RF_PA_TABLE3_OFF 0x2b - -__xdata __at (0xdf2c) uint8_t RF_PA_TABLE2; -#define RF_PA_TABLE2_OFF 0x2c - -__xdata __at (0xdf2d) uint8_t RF_PA_TABLE1; -#define RF_PA_TABLE1_OFF 0x2d - -__xdata __at (0xdf2e) uint8_t RF_PA_TABLE0; -#define RF_PA_TABLE0_OFF 0x2e - -__xdata __at (0xdf36) uint8_t RF_PARTNUM; -#define RF_PARTNUM_OFF 0x36 - -__xdata __at (0xdf37) uint8_t RF_VERSION; -#define RF_VERSION_OFF 0x37 - -__xdata __at (0xdf38) uint8_t RF_FREQEST; -#define RF_FREQEST_OFF 0x38 - -__xdata __at (0xdf39) uint8_t RF_LQI; -#define RF_LQI_OFF 0x39 - -#define RF_LQI_CRC_OK (1 << 7) -#define RF_LQI_LQI_EST_MASK (0x7f) - -__xdata __at (0xdf3a) uint8_t RF_RSSI; -#define RF_RSSI_OFF 0x3a - -__xdata __at (0xdf3b) uint8_t RF_MARCSTATE; -#define RF_MARCSTATE_OFF 0x3b - -#define RF_MARCSTATE_MASK 0x0f -#define RF_MARCSTATE_SLEEP 0x00 -#define RF_MARCSTATE_IDLE 0x01 -#define RF_MARCSTATE_VCOON_MC 0x03 -#define RF_MARCSTATE_REGON_MC 0x04 -#define RF_MARCSTATE_MANCAL 0x05 -#define RF_MARCSTATE_VCOON 0x06 -#define RF_MARCSTATE_REGON 0x07 -#define RF_MARCSTATE_STARTCAL 0x08 -#define RF_MARCSTATE_BWBOOST 0x09 -#define RF_MARCSTATE_FS_LOCK 0x0a -#define RF_MARCSTATE_IFADCON 0x0b -#define RF_MARCSTATE_ENDCAL 0x0c -#define RF_MARCSTATE_RX 0x0d -#define RF_MARCSTATE_RX_END 0x0e -#define RF_MARCSTATE_RX_RST 0x0f -#define RF_MARCSTATE_TXRX_SWITCH 0x10 -#define RF_MARCSTATE_RX_OVERFLOW 0x11 -#define RF_MARCSTATE_FSTXON 0x12 -#define RF_MARCSTATE_TX 0x13 -#define RF_MARCSTATE_TX_END 0x14 -#define RF_MARCSTATE_RXTX_SWITCH 0x15 -#define RF_MARCSTATE_TX_UNDERFLOW 0x16 - - -__xdata __at (0xdf3c) uint8_t RF_PKTSTATUS; -#define RF_PKTSTATUS_OFF 0x3c - -#define RF_PKTSTATUS_CRC_OK (1 << 7) -#define RF_PKTSTATUS_CS (1 << 6) -#define RF_PKTSTATUS_PQT_REACHED (1 << 5) -#define RF_PKTSTATUS_CCA (1 << 4) -#define RF_PKTSTATUS_SFD (1 << 3) - -__xdata __at (0xdf3d) uint8_t RF_VCO_VC_DAC; -#define RF_VCO_VC_DAC_OFF 0x3d - -#define PACKET_LEN 128 - -void -radio_init(void); - -void -delay (unsigned char n); diff --git a/target/radio/recv.c b/target/radio/recv.c deleted file mode 100644 index c50c3205..00000000 --- a/target/radio/recv.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include "radio.h" - -main () -{ - static uint8_t packet[PACKET_LEN + 2]; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - /* Set P2_0 to output */ - P1 = 0; - P1DIR = 0x02; - radio_init (); - delay(100); - - for (;;) { - uint8_t i; - RFST = RFST_SIDLE; - RFIF = 0; - delay(100); - RFST = RFST_SRX; -// while (!(RFIF & RFIF_IM_CS)); -// P1 = 2; - for (i = 0; i < PACKET_LEN + 2; i++) { - while (!RFTXRXIF) - ; - P1=2; - RFTXRXIF = 0; - packet[i] = RFD; - } - P1 = 0; - - /* check packet contents */ - for (i = 0; i < PACKET_LEN; i++) - if (packet[i] != i) - break; - - /* get excited if the packet came through correctly */ - if (i == PACKET_LEN && - packet[PACKET_LEN+1] & PKT_APPEND_STATUS_1_CRC_OK) - { - for (i = 0; i < 5; i++){ - P1 = 2; - delay(100); - P1 = 0; - delay(100); - } - } - delay(100); - } -} diff --git a/target/radio/xmit.c b/target/radio/xmit.c deleted file mode 100644 index e80a0f8b..00000000 --- a/target/radio/xmit.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright © 2009 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include "radio.h" - -main () -{ - int16_t j; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - P1 = 0; - P1DIR = 3; - radio_init (); - delay(100); - - for (;;) { - uint8_t i; - - for (j = 0; j < 100; j++) - delay(100); - P1 = 2; - RFST = RFST_SIDLE; - delay(1); - RFST = RFST_STX; - for (i = 0; i < PACKET_LEN; i++) { - while (!RFTXRXIF); - RFTXRXIF = 0; - RFD = i; - } - P1 = 0; - } -} diff --git a/target/serial/Makefile b/target/serial/Makefile deleted file mode 100644 index 3a1d81e8..00000000 --- a/target/serial/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=--out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf800 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=serial.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=serial-flash.ihx serial-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -serial-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o serial-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o serial-flash.ihx $(REL) - -serial-flash.ihx: serial-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) - -install: diff --git a/target/serial/serial.c b/target/serial/serial.c deleted file mode 100644 index 63f6c6de..00000000 --- a/target/serial/serial.c +++ /dev/null @@ -1,270 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include <stdint.h> - -/* - * Validate UART1 - */ - -sfr at 0x80 P0; -sfr at 0x90 P1; -sfr at 0xA0 P2; -sfr at 0xC6 CLKCON; -sfr at 0xbe SLEEP; - -# define SLEEP_USB_EN (1 << 7) -# define SLEEP_XOSC_STB (1 << 6) - -sfr at 0xF1 PERCFG; -#define PERCFG_T1CFG_ALT_1 (0 << 6) -#define PERCFG_T1CFG_ALT_2 (1 << 6) - -#define PERCFG_T3CFG_ALT_1 (0 << 5) -#define PERCFG_T3CFG_ALT_2 (1 << 5) - -#define PERCFG_T4CFG_ALT_1 (0 << 4) -#define PERCFG_T4CFG_ALT_2 (1 << 4) - -#define PERCFG_U1CFG_ALT_1 (0 << 1) -#define PERCFG_U1CFG_ALT_2 (1 << 1) - -#define PERCFG_U0CFG_ALT_1 (0 << 0) -#define PERCFG_U0CFG_ALT_2 (1 << 0) - -sfr at 0xF2 ADCCFG; -sfr at 0xF3 P0SEL; -sfr at 0xF4 P1SEL; -sfr at 0xF5 P2SEL; - -sfr at 0xFD P0DIR; -sfr at 0xFE P1DIR; -sfr at 0xFF P2DIR; -sfr at 0x8F P0INP; -sfr at 0xF6 P1INP; -sfr at 0xF7 P2INP; - -sfr at 0x89 P0IFG; -sfr at 0x8A P1IFG; -sfr at 0x8B P2IFG; - -sbit at 0x90 P1_0; -sbit at 0x91 P1_1; -sbit at 0x92 P1_2; -sbit at 0x93 P1_3; -sbit at 0x94 P1_4; -sbit at 0x95 P1_5; -sbit at 0x96 P1_6; -sbit at 0x97 P1_7; - -/* - * UART registers - */ - -sfr at 0x86 U0CSR; -sfr at 0xF8 U1CSR; - -/* - * IRCON2 - */ -sfr at 0xE8 IRCON2; /* CPU Interrupt Flag 5 */ - -sbit at 0xE8 USBIF; /* USB interrupt flag (shared with Port2) */ -sbit at 0xE8 P2IF; /* Port2 interrupt flag (shared with USB) */ -sbit at 0xE9 UTX0IF; /* USART0 TX interrupt flag */ -sbit at 0xEA UTX1IF; /* USART1 TX interrupt flag (shared with I2S TX) */ -sbit at 0xEA I2STXIF; /* I2S TX interrupt flag (shared with USART1 TX) */ -sbit at 0xEB P1IF; /* Port1 interrupt flag */ -sbit at 0xEC WDTIF; /* Watchdog timer interrupt flag */ - -# define UxCSR_MODE_UART (1 << 7) -# define UxCSR_MODE_SPI (0 << 7) -# define UxCSR_RE (1 << 6) -# define UxCSR_SLAVE (1 << 5) -# define UxCSR_MASTER (0 << 5) -# define UxCSR_FE (1 << 4) -# define UxCSR_ERR (1 << 3) -# define UxCSR_RX_BYTE (1 << 2) -# define UxCSR_TX_BYTE (1 << 1) -# define UxCSR_ACTIVE (1 << 0) - -sfr at 0xc4 U0UCR; -sfr at 0xfb U1UCR; - -# define UxUCR_FLUSH (1 << 7) -# define UxUCR_FLOW_DISABLE (0 << 6) -# define UxUCR_FLOW_ENABLE (1 << 6) -# define UxUCR_D9_EVEN_PARITY (0 << 5) -# define UxUCR_D9_ODD_PARITY (1 << 5) -# define UxUCR_BIT9_8_BITS (0 << 4) -# define UxUCR_BIT9_9_BITS (1 << 4) -# define UxUCR_PARITY_DISABLE (0 << 3) -# define UxUCR_PARITY_ENABLE (1 << 3) -# define UxUCR_SPB_1_STOP_BIT (0 << 2) -# define UxUCR_SPB_2_STOP_BITS (1 << 2) -# define UxUCR_STOP_LOW (0 << 1) -# define UxUCR_STOP_HIGH (1 << 1) -# define UxUCR_START_LOW (0 << 0) -# define UxUCR_START_HIGH (1 << 0) - -sfr at 0xc5 U0GCR; -sfr at 0xfc U1GCR; - -# define UxGCR_CPOL_NEGATIVE (0 << 7) -# define UxGCR_CPOL_POSITIVE (1 << 7) -# define UxGCR_CPHA_FIRST_EDGE (0 << 6) -# define UxGCR_CPHA_SECOND_EDGE (1 << 6) -# define UxGCR_ORDER_LSB (0 << 5) -# define UxGCR_ORDER_MSB (1 << 5) -# define UxGCR_BAUD_E_MASK (0x1f) -# define UxGCR_BAUD_E_SHIFT 0 - -sfr at 0xc1 U0DBUF; -sfr at 0xf9 U1DBUF; -sfr at 0xc2 U0BAUD; -sfr at 0xfa U1BAUD; - -#define MOSI P1_5 -#define MISO P1_4 -#define SCK P1_3 -#define CS P1_2 - -#define DEBUG P1_1 - -#define USART 1 - -#define nop() _asm nop _endasm; - -void -delay (unsigned char n) -{ - unsigned char i = 0; - unsigned char j = 0; - - n++; - while (--n != 0) - while (--i != 0) - while (--j != 0) - nop(); -} - -/* - * This version uses the USART in SPI mode - */ -void -usart_init(void) -{ - P1DIR |= (1 << 2); - /* - * Configure the peripheral pin choices - * for both of the serial ports - * - * Note that telemetrum will use U1CFG_ALT_2 - * but that overlaps with SPI ALT_2, so until - * we can test that this works, we'll set this - * to ALT_1 - */ - PERCFG = (PERCFG_U1CFG_ALT_2 | - PERCFG_U0CFG_ALT_1); - - /* - * Make the UART pins controlled by the UART - * hardware - */ - P1SEL |= ((1 << 6) | (1 << 7)); - - /* - * UART mode with the receiver enabled - */ - U1CSR = (UxCSR_MODE_UART | - UxCSR_RE); - /* - * Pick a 38.4kbaud rate - */ - U1BAUD = 163; - U1GCR = 10 << UxGCR_BAUD_E_SHIFT; /* 38400 */ -// U1GCR = 3 << UxGCR_BAUD_E_SHIFT; /* 300 */ - /* - * Reasonable serial parameters - */ - U1UCR = (UxUCR_FLUSH | - UxUCR_FLOW_DISABLE | - UxUCR_D9_ODD_PARITY | - UxUCR_BIT9_8_BITS | - UxUCR_PARITY_DISABLE | - UxUCR_SPB_2_STOP_BITS | - UxUCR_STOP_HIGH | - UxUCR_START_LOW); -} - -void -usart_out_byte(uint8_t byte) -{ - U1DBUF = byte; - while (!UTX1IF) - ; - UTX1IF = 0; -} - -void -usart_out_string(uint8_t *string) -{ - uint8_t b; - - while (b = *string++) - usart_out_byte(b); -} - -uint8_t -usart_in_byte(void) -{ - uint8_t b; - while ((U1CSR & UxCSR_RX_BYTE) == 0) - ; - b = U1DBUF; - U1CSR &= ~UxCSR_RX_BYTE; - return b; -} - -void -debug_byte(uint8_t byte) -{ - uint8_t s; - - for (s = 0; s < 8; s++) { - DEBUG = byte & 1; - delay(5); - byte >>= 1; - } -} - -main () -{ - P1DIR |= 2; - CLKCON = 0; - while (!(SLEEP & SLEEP_XOSC_STB)) - ; - - usart_init(); - - for (;;) { - usart_out_string("hello world\r\n"); - debug_byte(usart_in_byte()); - } - -} diff --git a/target/simple/Makefile b/target/simple/Makefile deleted file mode 100644 index 70c0f888..00000000 --- a/target/simple/Makefile +++ /dev/null @@ -1,44 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=-L/local/share/sdcc/lib/large --out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=simple.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=simple-flash.ihx simple-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -simple-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o simple-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o simple-flash.ihx $(REL) - -simple-flash.ihx: simple-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) diff --git a/target/simple/simple.c b/target/simple/simple.c deleted file mode 100644 index b7ea1019..00000000 --- a/target/simple/simple.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -sfr at 0x90 P1; -sfr at 0xC6 CLKCON; - -sfr at 0xFE P1DIR; -sfr at 0xF6 P1INP; - -void delay(int n) __reentrant -{ - while (n--) - _asm nop _endasm; -} -int -main (void) __reentrant -{ - long i; - CLKCON = 0; - /* Set p1_1 to output */ - P1DIR = 0x02; - for (;;) { - P1 ^= 0x2; - for (i = 0; i < 1000; i++) - delay(1000); - } -} diff --git a/target/timer/Makefile b/target/timer/Makefile deleted file mode 100644 index 99e06b8d..00000000 --- a/target/timer/Makefile +++ /dev/null @@ -1,44 +0,0 @@ -CC=sdcc -NO_OPT=--nogcse --noinvariant --noinduction --nojtbound --noloopreverse \ - --nolabelopt --nooverlay --peep-asm -DEBUG=--debug - -CFLAGS=--model-large $(DEBUG) --less-pedantic \ - --no-peep --int-long-reent --float-reent \ - --data-loc 0x30 - -LDFLAGS=-L/usr/share/sdcc/lib/large --out-fmt-ihx -LDFLAGS_RAM=$(LDFLAGS) --code-loc 0xf000 --xram-loc 0xf400 --xram-size 1024 - -LDFLAGS_FLASH=$(LDFLAGS) --code-loc 0x0000 --xram-loc 0xf000 --xram-size 1024 - -SRC=timer.c -ADB=$(SRC:.c=.adb) -ASM=$(SRC:.c=.asm) -LNK=$(SRC:.c=.lnk) -LST=$(SRC:.c=.lst) -REL=$(SRC:.c=.rel) -RST=$(SRC:.c=.rst) -SYM=$(SRC:.c=.sym) - -PROGS=timer-flash.ihx timer-ram.ihx -PCDB=$(PROGS:.ihx=.cdb) -PLNK=$(PROGS:.ihx=.lnk) -PMAP=$(PROGS:.ihx=.map) -PMEM=$(PROGS:.ihx=.mem) -PAOM=$(PROGS:.ihx=) - -%.rel : %.c - $(CC) -c $(CFLAGS) -o$*.rel $< - -all: $(PROGS) - -timer-ram.ihx: $(REL) Makefile - $(CC) $(LDFLAGS_RAM) $(CFLAGS) -o timer-ram.ihx $(REL) - $(CC) $(LDFLAGS_FLASH) $(CFLAGS) -o timer-flash.ihx $(REL) - -timer-flash.ihx: timer-ram.ihx - -clean: - rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM) - rm -f $(PROGS) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM) diff --git a/target/timer/cc1111.h b/target/timer/cc1111.h deleted file mode 100644 index 76c95c27..00000000 --- a/target/timer/cc1111.h +++ /dev/null @@ -1,294 +0,0 @@ -/*------------------------------------------------------------------------- - Register Declarations for the ChipCon CC1111 Processor Range - - Copyright © 2008 Keith Packard <keithp@keithp.com> - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. - - You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - - Adapted from the Cygnal C8051F12x config file which is: - - Copyright (C) 2003 - Maarten Brock, sourceforge.brock@dse.nl - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA --------------------------------------------------------------------------*/ - -#ifndef _CC1111_H_ -#define _CC1111_H_ - - -/* BYTE Registers */ - -sfr at 0x80 P0 ; /* PORT 0 */ -sfr at 0x81 SP ; /* STACK POINTER */ -sfr at 0x82 DPL ; /* DATA POINTER - LOW BYTE */ -sfr at 0x83 DPH ; /* DATA POINTER - HIGH BYTE */ -sfr at 0x84 DPL1 ; /* DATA POINTER 1 - LOW BYTE */ -sfr at 0x85 DPH1 ; /* DATA POINTER 1 - HIGH BYTE */ -sfr at 0x86 U0CSR ; /* USART 0 Control and status */ -sfr at 0x87 PCON ; /* POWER CONTROL */ -sfr at 0x88 TCON ; /* TIMER CONTROL */ -sfr at 0x89 P0IFG ; /* TIMER MODE */ -sfr at 0x8A P1IFG ; /* TIMER 0 - LOW BYTE */ -sfr at 0x8B P2IFG ; /* TIMER 1 - LOW BYTE */ -sfr at 0x8C PICTL ; /* TIMER 0 - HIGH BYTE */ -sfr at 0x8D P1IEN ; /* TIMER 1 - HIGH BYTE */ - -sfr at 0x8F P0INP ; /* FLASH WRITE/ERASE CONTROL */ -sfr at 0x90 P1 ; /* PORT 1 */ -sfr at 0x91 RFIM ; /* UART 0 STATUS */ -sfr at 0x92 DPS ; /* */ -sfr at 0x93 MPAGE ; /* */ -sfr at 0x94 _SFR94_ ; /* */ -sfr at 0x95 ENDIAN ; /* */ -sfr at 0x96 _SFR96_ ; /* */ -sfr at 0x97 _SFR97_ ; /* */ -sfr at 0x98 S0CON ; /* UART 0 CONTROL */ -sfr at 0x99 _SFR99_ ; /* UART 0 BUFFER */ -sfr at 0x9A IEN2 ; /* SPI 0 CONFIGURATION */ -sfr at 0x9B S1CON ; /* SPI 0 DATA */ -sfr at 0x9C T2CT ; /* SPI 0 DATA */ -sfr at 0x9D T2PR ; /* SPI 0 CLOCK RATE CONTROL */ -sfr at 0x9E T2CTL ; /* SPI 0 CLOCK RATE CONTROL */ -sfr at 0x9F _SFR9F_ ; /* SPI 0 CLOCK RATE CONTROL */ -sfr at 0xA0 P2 ; /* PORT 2 */ -sfr at 0xA1 WORIRQ ; /* EMIF TIMING CONTROL */ -sfr at 0xA2 WORCTRL ; /* EMIF CONTROL */ -sfr at 0xA3 WOREVT0 ; /* EMIF CONFIGURATION */ -sfr at 0xA4 WOREVT1 ; /* EMIF CONFIGURATION */ -sfr at 0xA5 WORTIME0 ; /* EMIF CONFIGURATION */ -sfr at 0xA6 WORTIME1 ; /* EMIF CONFIGURATION */ -sfr at 0xA7 _SFRA7_ ; /* EMIF CONFIGURATION */ -sfr at 0xA8 IEN0 ; /* INTERRUPT ENABLE */ -sfr at 0xA9 IP0 ; /* UART 0 SLAVE ADDRESS */ -sfr at 0xAA _SFRAA_ ; /* */ -sfr at 0xAB FWT ; /* */ -sfr at 0xAC FADDRL ; /* */ -sfr at 0xAD FADDRH ; /* */ -sfr at 0xAE FCTL ; /* */ -sfr at 0xAF FWDATA ; /* */ -sfr at 0xB0 _SFRB0_ ; /* */ -sfr at 0xB1 ENCDI ; /* FLASH BANK SELECT */ -sfr at 0xB2 ENCDO ; /* */ -sfr at 0xB3 ENCCS ; /* */ -sfr at 0xB4 ADCCON1 ; /* */ -sfr at 0xB5 ADCCON2 ; /* */ -sfr at 0xB6 ADCCON3 ; /* */ -sfr at 0xB8 IEN1 ; /* INTERRUPT PRIORITY */ -sfr at 0xB9 IP1 ; /* */ -sfr at 0xBA ADCL ; /* */ -sfr at 0xBB ADCH ; /* */ -sfr at 0xBC RNDL ; /* */ -sfr at 0xBD RNDH ; /* */ -sfr at 0xBE SLEEP ; /* */ -sfr at 0xC0 IRCON ; /* */ -sfr at 0xC1 U0DBUF ; /* */ -sfr at 0xC2 U0BAUD ; /* */ -sfr at 0xC4 U0UCR ; /* */ -sfr at 0xC5 U0GCR ; /* */ -sfr at 0xC6 CLKCON ; /* */ -sfr at 0xC7 MEMCTR ; /* */ -sfr at 0xC9 WDCTL ; /* */ -sfr at 0xCA T3CNT ; /* */ -sfr at 0xCB T3CTL ; /* */ -sfr at 0xCC T3CCTL0 ; /* */ -sfr at 0xCD T3CC0 ; /* */ -sfr at 0xCE T3CCTL1 ; /* */ -sfr at 0xCF T3CC1 ; /* */ -sfr at 0xD0 PSW ; /* */ -sfr at 0xD1 DMAIRQ ; /* */ -sfr at 0xD2 DMA1CFGL ; /* */ -sfr at 0xD3 DMA1CFGH ; /* */ -sfr at 0xD4 DMA0CFGL ; /* */ -sfr at 0xD5 DMA0CFGH ; /* */ -sfr at 0xD6 DMAARM ; /* */ -sfr at 0xD7 DMAREQ ; /* */ -sfr at 0xD8 TIMIF ; /* */ -sfr at 0xD9 RFD ; /* */ -sfr at 0xDA T1CC0L ; /* */ -sfr at 0xDB T1CC0H ; /* */ -sfr at 0xDC T1CC1L ; /* */ -sfr at 0xDD T1CC1H ; /* */ -sfr at 0xDE T1CC2L ; /* */ -sfr at 0xDF T1CC2H ; /* */ -sfr at 0xE0 ACC ; /* ACCUMULATOR */ -sfr at 0xE1 RFST ; /* */ -sfr at 0xE2 T1CNTL ; /* */ -sfr at 0xE3 T1CNTH ; /* */ -sfr at 0xE4 T1CTL ; /* */ -sfr at 0xE5 T1CCTL0 ; /* */ -sfr at 0xE6 T1CCTL1 ; /* */ -sfr at 0xE7 T1CCTL2 ; /* */ -sfr at 0xE8 IRCON2 ; /* */ -sfr at 0xE9 RFIF ; /* */ -sfr at 0xEA T4CNT ; /* */ -sfr at 0xEB T4CTL ; /* */ -sfr at 0xEC T4CCTL0 ; /* */ -sfr at 0xED T4CC0 ; /* */ -sfr at 0xEE T4CCTL1 ; /* */ -sfr at 0xEF T4CC1 ; /* */ -sfr at 0xF0 B ; /* */ -sfr at 0xF1 PERCFG ; /* */ -sfr at 0xF2 ADCCFG ; /* */ -sfr at 0xF3 P0SEL ; /* */ -sfr at 0xF4 P1SEL ; /* */ -sfr at 0xF5 P2SEL ; /* */ -sfr at 0xF6 P1INP ; /* */ -sfr at 0xF7 P2INP ; /* */ -sfr at 0xF8 U1CSR ; /* */ -sfr at 0xF9 U1DBUF ; /* */ -sfr at 0xFA U1BAUD ; /* */ -sfr at 0xFB U1UCR ; /* */ -sfr at 0xFC U1GCR ; /* */ -sfr at 0xFD P0DIR ; /* */ -sfr at 0xFE P1DIR ; /* */ -sfr at 0xFF P2DIR ; /* */ - -/* BIT Registers */ - -/* P0 0x80 */ -sbit at 0x80 P0_0 ; -sbit at 0x81 P0_1 ; -sbit at 0x82 P0_2 ; -sbit at 0x83 P0_3 ; -sbit at 0x84 P0_4 ; -sbit at 0x85 P0_5 ; -sbit at 0x86 P0_6 ; -sbit at 0x87 P0_7 ; - -/* TCON 0x88 */ -sbit at 0x89 RFTXRXIF; /* */ -sbit at 0x8B URX0IF ; /* */ -sbit at 0x8D ADCIF ; /* */ -sbit at 0x8F URX1IF ; /* */ -sbit at 0x8F I2SRXIF ; /* */ - -/* SCON0 0x98 */ -sbit at 0x98 ENCIF_0 ; /* UART 0 RX INTERRUPT FLAG */ -sbit at 0x99 ENCIF_1 ; /* UART 0 RX INTERRUPT FLAG */ - -/* IEN0 0xA8 */ -sbit at 0xA8 RFTXRXIE; /* RF TX/RX done interrupt enable */ -sbit at 0xA9 ADCIE ; /* ADC interrupt enable */ -sbit at 0xAA URX0IE ; /* USART0 RX interrupt enable */ -sbit at 0xAB URX1IE ; /* USART1 RX interrupt enable */ -sbit at 0xAB I2SRXIE ; /* I2S RX interrupt enable */ -sbit at 0xAC ENCIE ; /* AES interrupt enable */ -sbit at 0xAD STIE ; /* Sleep Timer interrupt enable */ -sbit at 0xAF EA ; /* GLOBAL INTERRUPT ENABLE */ - -/* IEN1 0xB8 */ -sbit at 0xB8 DMAIE ; /* DMA transfer interrupt enable */ -sbit at 0xB9 T1IE ; /* Timer 1 interrupt enable */ -sbit at 0xBA T2IE ; /* Timer 2 interrupt enable */ -sbit at 0xBB T3IE ; /* Timer 3 interrupt enable */ -sbit at 0xBC T4IE ; /* Timer 4 interrupt enable */ -sbit at 0xBD P0IE ; /* Port 0 interrupt enable */ - -/* IRCON 0xC0 */ -sbit at 0xC0 DMAIF ; /* */ -sbit at 0xC1 T1IF ; /* */ -sbit at 0xC2 T2IF ; /* */ -sbit at 0xC3 T3IF ; /* */ -sbit at 0xC4 T4IF ; /* */ -sbit at 0xC5 P0IF ; /* */ -sbit at 0xC7 STIF ; /* */ - -/* PSW 0xD0 */ -sbit at 0xD0 P ; /* ACCUMULATOR PARITY FLAG */ -sbit at 0xD1 F1 ; /* USER FLAG 1 */ -sbit at 0xD2 OV ; /* OVERFLOW FLAG */ -sbit at 0xD3 RS0 ; /* REGISTER BANK SELECT 0 */ -sbit at 0xD4 RS1 ; /* REGISTER BANK SELECT 1 */ -sbit at 0xD5 F0 ; /* USER FLAG 0 */ -sbit at 0xD6 AC ; /* AUXILIARY CARRY FLAG */ -sbit at 0xD7 CY ; /* CARRY FLAG */ - -/* TIMIF D8H */ -sbit at 0xD8 T3OVFIF ; /* */ -sbit at 0xD9 T3CH0IF ; /* */ -sbit at 0xDA T3CH1IF ; /* */ -sbit at 0xDB T4OVFIF ; /* */ -sbit at 0xDC T4CH0IF ; /* */ -sbit at 0xDD T4CH1IF ; /* */ -sbit at 0xDE OVFIM ; /* */ - -/* IRCON2 E8H */ -sbit at 0xE8 P2IF ; /* */ -sbit at 0xE8 USBIF ; /* */ -sbit at 0xE9 UTX0IF ; /* */ -sbit at 0xEA UTX1IF ; /* */ -sbit at 0xEA I2STXIF ; /* */ -sbit at 0xEB P1IF ; /* */ -sbit at 0xEC WDTIF ; /* */ - -/* U1CSR F8H */ -sbit at 0xF8 U1_ACTIVE ; /* */ -sbit at 0xF9 U1_TX_BYTE ; /* */ -sbit at 0xFA U1_RX_BYTE ; /* */ -sbit at 0xFB U1_ERR ; /* */ -sbit at 0xFC U1_FE ; /* */ -sbit at 0xFD U1_SLAVE ; /* */ -sbit at 0xFE U1_RE ; /* */ -sbit at 0xFF U1_MODE ; /* */ - -#define T1CTL_MODE_SUSPENDED (0 << 0) -#define T1CTL_MODE_FREE (1 << 0) -#define T1CTL_MODE_MODULO (2 << 0) -#define T1CTL_MODE_UP_DOWN (3 << 0) -#define T1CTL_MODE_MASK (3 << 0) -#define T1CTL_DIV_1 (0 << 2) -#define T1CTL_DIV_8 (1 << 2) -#define T1CTL_DIV_32 (2 << 2) -#define T1CTL_DIV_128 (3 << 2) -#define T1CTL_DIV_MASK (3 << 2) -#define T1CTL_OVFIF (1 << 4) -#define T1CTL_CH0IF (1 << 5) -#define T1CTL_CH1IF (1 << 6) -#define T1CTL_CH2IF (1 << 7) - -#define T1CCTL_NO_CAPTURE (0 << 0) -#define T1CCTL_CAPTURE_RISING (1 << 0) -#define T1CCTL_CAPTURE_FALLING (2 << 0) -#define T1CCTL_CAPTURE_BOTH (3 << 0) -#define T1CCTL_CAPTURE_MASK (3 << 0) - -#define T1CCTL_MODE_CAPTURE (0 << 2) -#define T1CCTL_MODE_COMPARE (1 << 2) - -#define T1CTL_CMP_SET (0 << 3) -#define T1CTL_CMP_CLEAR (1 << 3) -#define T1CTL_CMP_TOGGLE (2 << 3) -#define T1CTL_CMP_SET_CLEAR (3 << 3) -#define T1CTL_CMP_CLEAR_SET (4 << 3) - -#define T1CTL_IM_DISABLED (0 << 6) -#define T1CTL_IM_ENABLED (1 << 6) - -#define T1CTL_CPSEL_NORMAL (0 << 7) -#define T1CTL_CPSEL_RF (1 << 7) - -#endif diff --git a/target/timer/timer.c b/target/timer/timer.c deleted file mode 100644 index ae75d0a8..00000000 --- a/target/timer/timer.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright © 2008 Keith Packard <keithp@keithp.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. - */ - -#include "cc1111.h" - -unsigned char irqs; - -void timer1_isr(void) interrupt 9 __reentrant -{ - ++irqs; - if (irqs == 100) { - P1 ^= 0x2; - irqs = 0; - } -} - -int -main (void) __reentrant -{ - CLKCON = 0; - P1DIR = 0x2; - P1 = 0xff; - - T1CTL = 0; - - /* 30000 */ - T1CC0H = 0x75; - T1CC0L = 0x30; - T1CCTL0 = T1CCTL_MODE_COMPARE; - T1CCTL1 = 0; - T1CCTL2 = 0; - - /* clear timer value */ - T1CNTL = 0; - OVFIM = 1; - T1CTL = T1CTL_MODE_MODULO | T1CTL_DIV_8; - T1IE = 1; - EA = 1; - for (;;); -} |