diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/cortexelf-v1/Makefile | 1 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_1802.c | 342 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_1802.h | 103 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_cortexelf.c | 6 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_flip_bits.5c | 23 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_hex.c | 36 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_hex.h | 21 | ||||
| -rw-r--r-- | src/cortexelf-v1/ao_pins.h | 47 |
8 files changed, 453 insertions, 126 deletions
diff --git a/src/cortexelf-v1/Makefile b/src/cortexelf-v1/Makefile index d7157521..8cc6ce31 100644 --- a/src/cortexelf-v1/Makefile +++ b/src/cortexelf-v1/Makefile @@ -73,6 +73,7 @@ ALTOS_SRC = \ ao_button.c \ ao_event.c \ ao_1802.c \ + ao_hex.c \ ao_lisp_lex.c \ ao_lisp_mem.c \ ao_lisp_cons.c \ diff --git a/src/cortexelf-v1/ao_1802.c b/src/cortexelf-v1/ao_1802.c index 55e778df..b7e11637 100644 --- a/src/cortexelf-v1/ao_1802.c +++ b/src/cortexelf-v1/ao_1802.c @@ -17,9 +17,6 @@ #include <ao_1802.h> #include <ao_exti.h> -/* Signals muxed between 1802 and STM */ -uint8_t MRD, TPB, TPA, MWR; - /* Decoded address driven by TPA/TPB signals */ uint16_t ADDRESS; @@ -27,144 +24,305 @@ uint16_t ADDRESS; uint8_t DATA; /* Mux control */ -#define MUX_1802 0 -#define MUX_STM 1 +#define _MUX_1802 0 +#define _MUX_STM 1 uint8_t MUX_CONTROL; -/* Signals driven by 1802 only */ -uint8_t WAIT, CLEAR, Q, SC, N; -uint8_t DMA_IN, DMA_OUT, INTERRUPT; -uint8_t EF; +/* Signals muxed between 1802 and STM */ +uint8_t +MRD(void) { + return ao_gpio_get(MRD_PORT, MRD_BIT, MRD_PIN); +} -static uint8_t ma_stm; +void +MRD_set(uint8_t value) { + ao_gpio_set(MRD_PORT, MRD_BIT, MRD_PIN, value); +} uint8_t -MA(void) { - if (MUX_CONTROL == MUX_1802) - return (ao_gpio_get_all(MA_PORT) >> MA_SHIFT) & 0xff; - else - return ma_stm; +MWR(void) { + return ao_gpio_get(MWR_PORT, MWR_BIT, MWR_PIN); +} + +void +MWR_set(uint8_t value) { + ao_gpio_set(MWR_PORT, MWR_BIT, MWR_PIN, value); } static void -MA_set(uint8_t ma) { - ao_gpio_set_mask(MA_PORT, ((uint16_t) ma) << MA_SHIFT, 0xff << MA_SHIFT); - ma_stm = ma; +TPA_rising(void) +{ + ADDRESS = (ADDRESS & 0x00ff) | ((uint16_t) MA() << 8); + ao_wakeup(&ADDRESS); } -static uint8_t data_stm; +uint8_t +TPA(void) { + return ao_gpio_get(TPA_PORT, TPA_BIT, TPA_PIN); +} -static uint8_t -DATA_get(void) { - if (MUX_CONTROL == MUX_1802) - return ao_flip_bits[(ao_gpio_get_all(DATA_PORT) >> DATA_SHIFT) & 0xff]; - else - return data_stm; +void +TPA_set(uint8_t tpa) { + ao_gpio_set(TPA_PORT, TPA_BIT, TPA_PIN, tpa); + if (tpa) + TPA_rising(); +} + +static void +TPB_rising(void) +{ + ADDRESS = (ADDRESS & 0xff00) | MA(); + ao_wakeup(&ADDRESS); } static void -DATA_set(uint8_t data) { - ao_gpio_set_mask(DATA_PORT, ((uint16_t) ao_flip_bits[data]) << DATA_SHIFT, 0xff << DATA_SHIFT); - data_stm = data; +TPB_falling(void) +{ + DATA = BUS(); + ao_wakeup(&ADDRESS); } -static uint8_t -N_get(void) { - return (ao_gpio_get_all(N_PORT) >> N_SHIFT) & 0x7; +uint8_t +TPB(void) { + return ao_gpio_get(TPB_PORT, TPB_BIT, TPB_PIN); } -static uint8_t -EF_get(void) { - return (ao_gpio_get_all(EF_PORT) >> EF_SHIFT) & 0xf; +void +TPB_set(uint8_t tpb) { + ao_gpio_set(TPB_PORT, TPB_BIT, TPB_PIN, tpb); + if (tpb) + TPB_rising(); + else + TPB_falling(); } -static uint8_t -Q_get(void) { +uint8_t +MA(void) { + return (ao_gpio_get_all(MA_PORT) >> MA_SHIFT) & MA_MASK; +} + +void +MA_set(uint8_t ma) { + ao_gpio_set_mask(MA_PORT, ((uint16_t) ma) << MA_SHIFT, MA_MASK << MA_SHIFT); +} + +/* Tri-state data bus */ + +uint8_t +BUS(void) { + return ao_flip_bits_8[(ao_gpio_get_all(BUS_PORT) >> BUS_SHIFT) & BUS_MASK]; +} + +void +BUS_set(uint8_t bus) { + ao_gpio_set_mask(BUS_PORT, ao_flip_bits_8[bus] << BUS_SHIFT, BUS_MASK << BUS_SHIFT); +} + +void +BUS_stm(void) +{ + ao_set_output_mask(BUS_PORT, BUS_MASK << BUS_SHIFT); +} + +void +BUS_1802(void) +{ + ao_set_input_mask(BUS_PORT, BUS_MASK << BUS_SHIFT); +} + +/* Pins controlled by 1802 */ +uint8_t +SC(void) { + return ao_flip_bits_2[(ao_gpio_get_all(SC_PORT) >> SC_SHIFT) & SC_MASK]; +} + +uint8_t +Q(void) { return ao_gpio_get(Q_PORT, Q_BIT, Q_PIN); } -static uint8_t -SC_get(void) { - static const uint8_t flip_sc[4] = { 0, 2, 1, 3 }; - return flip_sc[(ao_gpio_get_all(SC_PORT) >> SC_SHIFT) & 3]; +uint8_t +N(void) { + return (ao_gpio_get_all(N_PORT) >> N_SHIFT) & N_MASK; +} + +/* Pins controlled by STM */ +uint8_t +EF(void) { + return (ao_gpio_get_all(EF_PORT) >> EF_SHIFT) & EF_MASK; } void -mrd(uint8_t value) { MRD = value; } +EF_set(uint8_t ef) { + ao_gpio_set_mask(EF_PORT, ef << EF_SHIFT, EF_MASK << EF_SHIFT); +} + +uint8_t +DMA_IN(void) { + return ao_gpio_get(DMA_IN_PORT, DMA_IN_BIT, DMA_IN_PIN); +} void -mwr(uint8_t value) { MWR = value; } +DMA_IN_set(uint8_t dma_in) { + ao_gpio_set(DMA_IN_PORT, DMA_IN_BIT, DMA_IN_PIN, dma_in); +} + +uint8_t +DMA_OUT(void) { + return ao_gpio_get(DMA_OUT_PORT, DMA_OUT_BIT, DMA_OUT_PIN); +} void -tpb(uint8_t value) { - TPB = value; +DMA_OUT_set(uint8_t dma_out) { + ao_gpio_set(DMA_OUT_PORT, DMA_OUT_BIT, DMA_OUT_PIN, dma_out); +} - /* Latch low address and data on rising edge of TPB */ - if (TPB) { - ADDRESS = (ADDRESS & 0xff00) | MA(); - DATA = DATA_get(); - N = N_get(); - ao_wakeup(&ADDRESS); - } +uint8_t +INT(void) { + return ao_gpio_get(INT_PORT, INT_BIT, INT_PIN); } void -tpa(uint8_t value) { - TPA = value; +INT_set(uint8_t dma_out) { + ao_gpio_set(INT_PORT, INT_BIT, INT_PIN, dma_out); +} + +uint8_t +CLEAR(void) { + return ao_gpio_get(CLEAR_PORT, CLEAR_BIT, CLEAR_PIN); +} + +void +CLEAR_set(uint8_t dma_out) { + ao_gpio_set(CLEAR_PORT, CLEAR_BIT, CLEAR_PIN, dma_out); +} +uint8_t +WAIT(void) { + return ao_gpio_get(WAIT_PORT, WAIT_BIT, WAIT_PIN); +} + +void +WAIT_set(uint8_t dma_out) { + ao_gpio_set(WAIT_PORT, WAIT_BIT, WAIT_PIN, dma_out); +} + +void +tpb_isr(void) { + /* Latch low address and data on rising edge of TPB */ + if (TPB()) + TPB_rising(); + else + TPB_falling(); +} + +void +tpa_isr(void) { /* Latch high address on rising edge of TPA */ - if (TPA) { - ADDRESS = (ADDRESS & 0x00ff) | ((uint16_t) MA() << 8); - SC = SC_get(); - if (SC == SC_EXECUTE) - EF = EF_get(); - ao_wakeup(&ADDRESS); - } + if (TPA()) + TPA_rising(); } -#define ao_1802_in(port, bit, callback) do { \ - ao_enable_input(port, bit, 0); \ - ao_exti_enable(port, bit); \ - ao_exti_set_callback(port, bit, callback); \ - (*callback)(); \ +#define ao_1802_in(port, bit, mode) do { \ + ao_gpio_set_mode(port, bit, mode); \ + ao_set_input(port, bit); \ + } while (0) + +#define ao_1802_in_isr(port, bit, mode) do { \ + ao_gpio_set_mode(port, bit, mode); \ + ao_set_input(port, bit); \ + ao_exti_enable(port, bit); \ } while (0) -static void mrd_isr(void) { mrd(ao_gpio_get(MRD_PORT, MRD_BIT, MRD_PIN)); } -static void mwr_isr(void) { mwr(ao_gpio_get(MWR_PORT, MWR_BIT, MWR_PIN)); } -static void tpb_isr(void) { tpb(ao_gpio_get(TPB_PORT, TPB_BIT, TPB_PIN)); } -static void tpa_isr(void) { tpa(ao_gpio_get(TPA_PORT, TPA_BIT, TPA_PIN)); } -static void q_isr(void) { Q = Q_get(); } +#define ao_1802_out_isr(port, bit) do { \ + ao_exti_disable(port, bit); \ + ao_set_output(port, bit); \ + } while (0) -static void -ao_set_1802(void) +void +MUX_1802(void) { - ao_gpio_set(MUX_PORT, MUX_BIT, MUX_PIN, 0); - ao_1802_in(MRD_PORT, MRD_BIT, mrd_isr); - ao_1802_in(MWR_PORT, MWR_BIT, mwr_isr); - ao_1802_in(TPB_PORT, TPB_BIT, tpb_isr); - ao_1802_in(TPA_PORT, TPA_BIT, tpa_isr); - MUX_CONTROL = MUX_1802; + if (MUX_CONTROL != _MUX_1802) { + /* Set pins to input, but pulled to idle value */ + ao_1802_in(MRD_PORT, MRD_BIT, AO_EXTI_MODE_PULL_UP); + ao_1802_in(MWR_PORT, MWR_BIT, AO_EXTI_MODE_PULL_UP); + ao_1802_in_isr(TPB_PORT, TPB_BIT, AO_EXTI_MODE_PULL_DOWN); + ao_1802_in_isr(TPA_PORT, TPA_BIT, AO_EXTI_MODE_PULL_DOWN); + ao_set_input_mask(MA_PORT, MA_MASK << MA_SHIFT); + + ao_gpio_set(MUX_PORT, MUX_BIT, MUX_PIN, 0); + + /* Now change the pins to eliminate the pull up/down */ + ao_gpio_set_mode(MRD_PORT, MRD_BIT, 0); + ao_gpio_set_mode(MWR_PORT, MWR_BIT, 0); + ao_gpio_set_mode(TPB_PORT, TPB_BIT, 0); + ao_gpio_set_mode(TPA_PORT, TPA_BIT, 0); + + MUX_CONTROL = _MUX_1802; + } } -static void -ao_set_arm(void) +void +MUX_stm(void) { - ao_enable_output(MRD_PORT, MRD_BIT, MRD_PIN, 1); - ao_enable_output(MWR_PORT, MWR_BIT, MWR_PIN, 1); - ao_enable_output(TPB_PORT, TPB_BIT, TPB_PIN, 0); - ao_enable_output(TPA_PORT, TPA_BIT, TPA_PIN, 0); - ao_gpio_set(MUX_PORT, MUX_BIT, MUX_PIN, 1); - MUX_CONTROL = MUX_STM; + if (MUX_CONTROL != _MUX_STM) { + /* Set the pins back to pull to the idle value */ + ao_gpio_set_mode(MRD_PORT, MRD_BIT, AO_EXTI_MODE_PULL_UP); + ao_gpio_set_mode(MWR_PORT, MWR_BIT, AO_EXTI_MODE_PULL_UP); + ao_gpio_set_mode(TPB_PORT, TPB_BIT, AO_EXTI_MODE_PULL_DOWN); + ao_gpio_set_mode(TPA_PORT, TPA_BIT, AO_EXTI_MODE_PULL_DOWN); + + ao_gpio_set(MUX_PORT, MUX_BIT, MUX_PIN, 1); + + /* Now set the pins as output, driven to the idle value */ + ao_set_output(MRD_PORT, MRD_BIT, MRD_PIN, 1); + ao_set_output(MWR_PORT, MWR_BIT, MWR_PIN, 1); + ao_set_output(TPB_PORT, TPB_BIT, TPB_PIN, 0); + ao_set_output(TPA_PORT, TPA_BIT, TPA_PIN, 0); + ao_set_output_mask(MA_PORT, MA_MASK << MA_SHIFT); + MUX_CONTROL = _MUX_STM; + } } void -ao_1802_control_init(void) +ao_1802_init(void) { - ao_set_1802(); + /* Multiplexed signals*/ + + /* active low signals */ + ao_enable_input(MRD_PORT, MRD_BIT, AO_EXTI_MODE_PULL_UP); + ao_enable_input(MWR_PORT, MWR_BIT, AO_EXTI_MODE_PULL_UP); + + /* active high signals with interrupts */ + ao_exti_setup(TPA_PORT, TPA_BIT, + AO_EXTI_MODE_PULL_DOWN | AO_EXTI_MODE_RISING | AO_EXTI_MODE_FALLING, + tpa_isr); + ao_exti_setup(TPB_PORT, TPB_BIT, + AO_EXTI_MODE_PULL_DOWN | AO_EXTI_MODE_RISING | AO_EXTI_MODE_FALLING, + tpb_isr); + + /* multiplexed address bus */ + ao_enable_input_mask(MA_PORT, MA_MASK << MA_SHIFT, 0); + + /* Data bus */ + + ao_enable_input_mask(BUS_PORT, BUS_MASK << BUS_SHIFT, 0); + + /* Pins controlled by 1802 */ + ao_enable_input_mask(SC_PORT, SC_MASK << SC_SHIFT, 0); + ao_enable_input(Q_PORT, Q_BIT, 0); + ao_enable_input_mask(N_PORT, N_MASK << N_SHIFT, 0); + + /* Pins controlled by STM */ + ao_enable_output_mask(EF_PORT, 0, EF_MASK << EF_SHIFT); + ao_enable_output(DMA_IN_PORT, DMA_IN_BIT, DMA_IN_PIN, 1); + ao_enable_output(DMA_OUT_PORT, DMA_OUT_BIT, DMA_OUT_PIN, 1); + ao_enable_output(INT_PORT, INT_BIT, INT_PIN, 1); + ao_enable_output(CLEAR_PORT, CLEAR_BIT, CLEAR_PIN, 1); + ao_enable_output(WAIT_PORT, WAIT_BIT, WAIT_PIN, 1); - ao_1802_in(Q_PORT, Q_BIT, q_isr); - (void) MA_set; - (void) DATA_set; - (void) ao_set_arm; + /* Force configuration to STM so that MUX_1802 will do something */ + MUX_CONTROL = _MUX_STM; + MUX_1802(); } diff --git a/src/cortexelf-v1/ao_1802.h b/src/cortexelf-v1/ao_1802.h index daa49f66..5ea89fee 100644 --- a/src/cortexelf-v1/ao_1802.h +++ b/src/cortexelf-v1/ao_1802.h @@ -15,20 +15,115 @@ #ifndef _AO_1802_H_ #define _AO_1802_H_ -/* Signals muxed between 1802 and STM */ -extern uint8_t MRD, TPB, TPA, MWR; - /* Decoded address driven by TPA/TPB signals */ extern uint16_t ADDRESS; /* Decoded data, driven by TPB signal */ extern uint8_t DATA; -extern uint8_t SC; +uint8_t +MRD(void); + +void +MRD_set(uint8_t value); + +uint8_t +MWR(void); + +void +MWR_set(uint8_t value); + +uint8_t +TPA(void); + +void +TPA_set(uint8_t tpa); + +uint8_t +TPB(void); + +void +TPB_set(uint8_t tpb); + +uint8_t +MA(void); + +void +MA_set(uint8_t ma); + +/* Tri-state data bus */ + +uint8_t +BUS(void); + +void +BUS_set(uint8_t bus); + +void +BUS_stm(void); + +void +BUS_1802(void); + +/* Pins controlled by 1802 */ +uint8_t +SC(void); + +uint8_t +Q(void); + +uint8_t +N(void); + +/* Pins controlled by STM */ +uint8_t +EF(void); + +void +EF_set(uint8_t ef); + +uint8_t +DMA_IN(void); + +void +DMA_IN_set(uint8_t dma_in); + +uint8_t +DMA_OUT(void); + +void +DMA_OUT_set(uint8_t dma_out); + +uint8_t +INT(void); + +void +INT_set(uint8_t dma_out); + +uint8_t +CLEAR(void); + +void +CLEAR_set(uint8_t dma_out); + +uint8_t +WAIT(void); + +void +WAIT_set(uint8_t dma_out); #define SC_FETCH 0 #define SC_EXECUTE 1 #define SC_DMA 2 #define SC_INTERRUPT 3 +void +MUX_1802(void); + +void +MUX_stm(void); + +void +ao_1802_init(void); + #endif /* _AO_1802_H_ */ diff --git a/src/cortexelf-v1/ao_cortexelf.c b/src/cortexelf-v1/ao_cortexelf.c index 77fbd0c0..decd6ef5 100644 --- a/src/cortexelf-v1/ao_cortexelf.c +++ b/src/cortexelf-v1/ao_cortexelf.c @@ -31,6 +31,8 @@ #include <ao_button.h> #include <ao_event.h> #include <ao_as1107.h> +#include <ao_hex.h> +#include <ao_1802.h> struct ao_task ball_task; @@ -274,6 +276,10 @@ main(void) ao_as1107_init(); + ao_1802_init(); + + ao_hex_init(); + ao_config_init(); ao_add_task(&ball_task, ao_ball, "ball"); diff --git a/src/cortexelf-v1/ao_flip_bits.5c b/src/cortexelf-v1/ao_flip_bits.5c index 055d5299..cd5507cc 100644 --- a/src/cortexelf-v1/ao_flip_bits.5c +++ b/src/cortexelf-v1/ao_flip_bits.5c @@ -1,19 +1,24 @@ #!/usr/bin/nickle -int flip_bits(int a) +int flip_bits(int a, int n) { int result = 0; - for (int pos = 0; pos < 8; pos++) + for (int pos = 0; pos < n; pos++) if ((a & (1 << pos)) != 0) - result |= (1 << (7 - pos)); + result |= (1 << (n - 1 - pos)); return result; } -printf ("static const uint8_t ao_flip_bits[256] = {\n"); +void print_flip_bits(string name, int n) { + printf ("static const uint8_t %s_%d[%d] = {\n", name, n, 1 << n); -for (int i = 0; i < 256; i++) { - printf (" 0x%02x,", flip_bits(i)); - if ((i & 0xf) == 0xf) - printf("\n"); + for (int i = 0; i < 1 << n; i++) { + printf (" 0x%02x,", flip_bits(i, n)); + if ((i & 0xf) == 0xf) + printf("\n"); + } + printf("};\n"); } -printf("};\n"); + +print_flip_bits("ao_flip_bits", 8); +print_flip_bits("ao_flip_bits", 2); diff --git a/src/cortexelf-v1/ao_hex.c b/src/cortexelf-v1/ao_hex.c new file mode 100644 index 00000000..1507407b --- /dev/null +++ b/src/cortexelf-v1/ao_hex.c @@ -0,0 +1,36 @@ +/* + * Copyright © 2017 Keith Packard <keithp@keithp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <ao.h> +#include "ao_hex.h" +#include "ao_as1107.h" +#include "ao_1802.h" + +static struct ao_task ao_hex_task; + +static void +ao_hex(void) +{ + for (;;) { + ao_as1107_write_16(0, ADDRESS); + ao_as1107_write_8(6, DATA); + ao_sleep(&ADDRESS); + } +} + +void +ao_hex_init(void) +{ + ao_add_task(&ao_hex_task, ao_hex, "hex"); +} diff --git a/src/cortexelf-v1/ao_hex.h b/src/cortexelf-v1/ao_hex.h new file mode 100644 index 00000000..674c1eee --- /dev/null +++ b/src/cortexelf-v1/ao_hex.h @@ -0,0 +1,21 @@ +/* + * Copyright © 2017 Keith Packard <keithp@keithp.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef _AO_HEX_H_ +#define _AO_HEX_H_ + +void +ao_hex_init(void); + +#endif /* _AO_HEX_H_ */ diff --git a/src/cortexelf-v1/ao_pins.h b/src/cortexelf-v1/ao_pins.h index d580ce3d..50add5d3 100644 --- a/src/cortexelf-v1/ao_pins.h +++ b/src/cortexelf-v1/ao_pins.h @@ -207,12 +207,6 @@ #define AO_MATRIX_COL_3_PIN 6 /* 1802 connections */ -#define MA_PORT (&stm_gpioe) -#define MA_SHIFT 0 - -#define DATA_PORT (&stm_gpioe) -#define DATA_SHIFT 8 - #define MRD_PORT (&stm_gpiob) #define MRD_BIT 15 @@ -225,34 +219,45 @@ #define TPA_PORT (&stm_gpioa) #define TPA_BIT 6 -#define MUX_PORT (&stm_gpiob) -#define MUX_BIT 1 +#define MA_PORT (&stm_gpioe) +#define MA_SHIFT 0 +#define MA_MASK 0xff -#define WAIT_PORT (&stm_gpioa) -#define WAIT_PIN 4 +#define BUS_PORT (&stm_gpioe) +#define BUS_SHIFT 8 +#define BUS_MASK 0xff -#define CLEAR_PORT (&stm_gpioa) -#define CLEAR_PIN 10 +#define SC_PORT (&stm_gpiob) +#define SC_SHIFT 13 +#define SC_MASK 3 #define Q_PORT (&stm_gpiob) #define Q_BIT 12 -#define SC_PORT (&stm_gpiob) -#define SC_SHIFT 13 - #define N_PORT (&stm_gpiod) #define N_SHIFT 13 +#define N_MASK 7 + +#define EF_PORT (&stm_gpiob) +#define EF_SHIFT 8 +#define EF_MASK 0xf #define DMA_IN_PORT (&stm_gpioa) -#define DMA_IN_PIN 0 +#define DMA_IN_BIT 0 #define DMA_OUT_PORT (&stm_gpioa) -#define DMA_OUT_PIN 9 +#define DMA_OUT_BIT 9 -#define INTERRUPT_PORT (&stm_gpioa) -#define INTERRUPT_PIN 2 +#define INT_PORT (&stm_gpioa) +#define INT_BIT 2 -#define EF_PORT (&stm_gpiob) -#define EF_SHIFT 8 +#define CLEAR_PORT (&stm_gpioa) +#define CLEAR_BIT 10 + +#define WAIT_PORT (&stm_gpioa) +#define WAIT_BIT 4 + +#define MUX_PORT (&stm_gpiob) +#define MUX_BIT 1 #endif /* _AO_PINS_H_ */ |