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-rw-r--r--src/drivers/ao_cc115l.c52
-rw-r--r--src/drivers/ao_cc1200.c629
-rw-r--r--src/drivers/ao_cc1200.h129
-rw-r--r--src/drivers/ao_cc1200_CC1200.h88
4 files changed, 614 insertions, 284 deletions
diff --git a/src/drivers/ao_cc115l.c b/src/drivers/ao_cc115l.c
index cf61acfe..9e116d62 100644
--- a/src/drivers/ao_cc115l.c
+++ b/src/drivers/ao_cc115l.c
@@ -246,6 +246,8 @@ ao_radio_idle(void)
}
/* Flush any pending TX bytes */
ao_radio_strobe(CC115L_SFTX);
+ /* Make sure the RF calibration is current */
+ ao_radio_strobe(CC115L_SCAL);
}
/*
@@ -325,23 +327,22 @@ static const struct {
static const uint16_t packet_setup[] = {
CC115L_MDMCFG3, (PACKET_DRATE_M),
- CC115L_MDMCFG2, (0x00 |
- (CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
+ CC115L_MDMCFG2, ((CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
(0 << CC115L_MDMCFG2_MANCHESTER_EN) |
(CC115L_MDMCFG2_SYNC_MODE_16BITS << CC115L_MDMCFG2_SYNC_MODE)),
};
/*
- * RDF deviation is 5kHz
+ * RDF deviation is 3kHz
*
* fdev = fosc >> 17 * (8 + dev_m) << dev_e
*
- * 26e6 / (2 ** 17) * (8 + 4) * (2 ** 1) = 4761Hz
+ * 26e6 / (2 ** 17) * (8 + 7) * (2 ** 0) = 2975
*/
-#define RDF_DEV_E 1
-#define RDF_DEV_M 4
+#define RDF_DEV_E 0
+#define RDF_DEV_M 7
/*
* For our RDF beacon, set the symbol rate to 2kBaud (for a 1kHz tone)
@@ -364,8 +365,7 @@ static const uint16_t rdf_setup[] = {
CC115L_MDMCFG4, ((0xf << 4) |
(RDF_DRATE_E << CC115L_MDMCFG4_DRATE_E)),
CC115L_MDMCFG3, (RDF_DRATE_M),
- CC115L_MDMCFG2, (0x00 |
- (CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
+ CC115L_MDMCFG2, ((CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
(0 << CC115L_MDMCFG2_MANCHESTER_EN) |
(CC115L_MDMCFG2_SYNC_MODE_NONE << CC115L_MDMCFG2_SYNC_MODE)),
};
@@ -401,8 +401,7 @@ static const uint16_t aprs_setup[] = {
CC115L_MDMCFG4, ((0xf << 4) |
(APRS_DRATE_E << CC115L_MDMCFG4_DRATE_E)),
CC115L_MDMCFG3, (APRS_DRATE_M),
- CC115L_MDMCFG2, (0x00 |
- (CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
+ CC115L_MDMCFG2, ((CC115L_MDMCFG2_MOD_FORMAT_GFSK << CC115L_MDMCFG2_MOD_FORMAT) |
(0 << CC115L_MDMCFG2_MANCHESTER_EN) |
(CC115L_MDMCFG2_SYNC_MODE_NONE << CC115L_MDMCFG2_SYNC_MODE)),
};
@@ -491,16 +490,21 @@ static const uint16_t radio_setup[] = {
AO_CC115L_DONE_INT_GPIO_IOCFG, CC115L_IOCFG_GPIO_CFG_PA_PD | (1 << CC115L_IOCFG_GPIO_INV),
CC115L_FIFOTHR, 0x47, /* TX FIFO Thresholds */
- CC115L_MDMCFG1, (0x00 |
- (CC115L_MDMCFG1_NUM_PREAMBLE_4 << CC115L_MDMCFG1_NUM_PREAMBLE) |
- (1 << CC115L_MDMCFG1_CHANSPC_E)),
+ CC115L_MDMCFG1, /* Modem Configuration */
+ ((CC115L_MDMCFG1_NUM_PREAMBLE_4 << CC115L_MDMCFG1_NUM_PREAMBLE) |
+ (1 << CC115L_MDMCFG1_CHANSPC_E)),
CC115L_MDMCFG0, 248, /* Channel spacing M value (100kHz channels) */
+ CC115L_MCSM1, 0x30, /* Main Radio Control State Machine Configuration */
CC115L_MCSM0, 0x38, /* Main Radio Control State Machine Configuration */
CC115L_RESERVED_0X20, 0xfb, /* Use setting from SmartRF Studio */
+ CC115L_FREND0, 0x10, /* Front End TX Configuration */
CC115L_FSCAL3, 0xe9, /* Frequency Synthesizer Calibration */
CC115L_FSCAL2, 0x2a, /* Frequency Synthesizer Calibration */
CC115L_FSCAL1, 0x00, /* Frequency Synthesizer Calibration */
CC115L_FSCAL0, 0x1f, /* Frequency Synthesizer Calibration */
+ CC115L_RESERVED_0X29, 0x59, /* RESERVED */
+ CC115L_RESERVED_0X2A, 0x7f, /* RESERVED */
+ CC115L_RESERVED_0X2B, 0x3f, /* RESERVED */
CC115L_TEST2, 0x81, /* Various Test Settings */
CC115L_TEST1, 0x35, /* Various Test Settings */
CC115L_TEST0, 0x09, /* Various Test Settings */
@@ -508,6 +512,12 @@ static const uint16_t radio_setup[] = {
static uint8_t ao_radio_configured = 0;
+#if HAS_RADIO_POWER
+#define RADIO_POWER ao_config.radio_power
+#else
+#define RADIO_POWER 0xc0
+#endif
+
static void
ao_radio_setup(void)
{
@@ -523,6 +533,8 @@ ao_radio_setup(void)
ao_config_get();
+ ao_radio_reg_write(CC115L_PA, RADIO_POWER);
+
ao_radio_strobe(CC115L_SCAL);
ao_radio_configured = 1;
@@ -553,6 +565,8 @@ ao_radio_get(void)
ao_radio_reg_write(CC115L_FREQ1, ao_config.radio_setting >> 8);
ao_radio_reg_write(CC115L_FREQ0, ao_config.radio_setting);
last_radio_setting = ao_config.radio_setting;
+ /* Make sure the RF calibration is current */
+ ao_radio_strobe(CC115L_SCAL);
}
if (ao_config.radio_rate != last_radio_rate) {
ao_radio_mode &= ~AO_RADIO_MODE_BITS_PACKET_TX;
@@ -666,23 +680,11 @@ ao_radio_rdf_abort(void)
#define POWER_STEP 0x08
-#if HAS_RADIO_POWER
-#define RADIO_POWER ao_config.radio_power
-#else
-#define RADIO_POWER 0xc0
-#endif
-
static void
ao_radio_stx(void)
{
- uint8_t power;
ao_radio_pa_on();
- ao_radio_reg_write(CC115L_PA, 0);
ao_radio_strobe(CC115L_STX);
- for (power = POWER_STEP; power < RADIO_POWER; power += POWER_STEP)
- ao_radio_reg_write(CC115L_PA, power);
- if (power != RADIO_POWER)
- ao_radio_reg_write(CC115L_PA, RADIO_POWER);
}
static void
diff --git a/src/drivers/ao_cc1200.c b/src/drivers/ao_cc1200.c
index a69cdc11..8546900e 100644
--- a/src/drivers/ao_cc1200.c
+++ b/src/drivers/ao_cc1200.c
@@ -21,30 +21,30 @@
#include <ao_fec.h>
#include <ao_packet.h>
-#define AO_RADIO_MAX_RECV sizeof(struct ao_packet)
-#define AO_RADIO_MAX_SEND sizeof(struct ao_packet)
-
static uint8_t ao_radio_mutex;
static uint8_t ao_radio_wake; /* radio ready. Also used as sleep address */
static uint8_t ao_radio_abort; /* radio operation should abort */
-static uint8_t ao_radio_mcu_wake; /* MARC status change */
-static uint8_t ao_radio_marc_status; /* Last read MARC status value */
-static uint8_t ao_radio_tx_finished; /* MARC status indicates TX finished */
int8_t ao_radio_rssi; /* Last received RSSI value */
-#define CC1200_DEBUG 1
-#define CC1200_TRACE 1
+#ifndef CC1200_DEBUG
+#define CC1200_DEBUG 0
+#endif
+
+#ifndef CC1200_LOW_LEVEL_DEBUG
+#define CC1200_LOW_LEVEL_DEBUG 0
+#endif
+
+#define CC1200_TRACE 0
+#define CC1200_APRS_TRACE 0
extern const uint32_t ao_radio_cal;
-#define FOSC 32000000
+#define FOSC 40000000
-#define ao_radio_try_select(task_id) ao_spi_try_get_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS,AO_SPI_SPEED_125kHz, task_id)
-#define ao_radio_select() ao_spi_get_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS,AO_SPI_SPEED_125kHz)
+#define ao_radio_select() ao_spi_get_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS,AO_SPI_SPEED_FAST)
#define ao_radio_deselect() ao_spi_put_mask(AO_CC1200_SPI_CS_PORT,(1 << AO_CC1200_SPI_CS_PIN),AO_CC1200_SPI_BUS)
-#define ao_radio_spi_send_sync(d,l) ao_spi_send_sync((d), (l), AO_CC1200_SPI_BUS)
#define ao_radio_spi_send(d,l) ao_spi_send((d), (l), AO_CC1200_SPI_BUS)
#define ao_radio_spi_send_fixed(d,l) ao_spi_send_fixed((d), (l), AO_CC1200_SPI_BUS)
#define ao_radio_spi_recv(d,l) ao_spi_recv((d), (l), AO_CC1200_SPI_BUS)
@@ -128,7 +128,6 @@ ao_radio_strobe(uint8_t addr)
return in;
}
-#if 0
static uint8_t
ao_radio_fifo_read(uint8_t *data, uint8_t len)
{
@@ -143,7 +142,6 @@ ao_radio_fifo_read(uint8_t *data, uint8_t len)
ao_radio_deselect();
return status;
}
-#endif
static uint8_t
ao_radio_fifo_write_start(void)
@@ -164,7 +162,7 @@ static inline uint8_t ao_radio_fifo_write_stop(uint8_t status) {
}
static uint8_t
-ao_radio_fifo_write(uint8_t *data, uint8_t len)
+ao_radio_fifo_write(const uint8_t *data, uint8_t len)
{
uint8_t status = ao_radio_fifo_write_start();
ao_radio_spi_send(data, len);
@@ -185,13 +183,11 @@ ao_radio_tx_fifo_space(void)
return CC1200_FIFO_SIZE - ao_radio_reg_read(CC1200_NUM_TXBYTES);
}
-#if CC1200_DEBUG || CC1200_TRACE
static uint8_t
ao_radio_status(void)
{
return ao_radio_strobe (CC1200_SNOP);
}
-#endif
void
ao_radio_recv_abort(void)
@@ -202,25 +198,6 @@ ao_radio_recv_abort(void)
#define ao_radio_rdf_value 0x55
-static uint8_t
-ao_radio_get_marc_status(void)
-{
- return ao_radio_reg_read(CC1200_MARC_STATUS1);
-}
-
-static void
-ao_radio_check_marc_status(void)
-{
- ao_radio_mcu_wake = 0;
- ao_radio_marc_status = ao_radio_get_marc_status();
-
- /* Anyt other than 'tx/rx finished' means an error occurred */
- if (ao_radio_marc_status & ~(CC1200_MARC_STATUS1_TX_FINISHED|CC1200_MARC_STATUS1_RX_FINISHED))
- ao_radio_abort = 1;
- if (ao_radio_marc_status & (CC1200_MARC_STATUS1_TX_FINISHED))
- ao_radio_tx_finished = 1;
-}
-
static void
ao_radio_isr(void)
{
@@ -232,13 +209,18 @@ ao_radio_isr(void)
static void
ao_radio_start_tx(void)
{
- ao_exti_set_callback(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, ao_radio_isr);
ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
- ao_radio_tx_finished = 0;
ao_radio_strobe(CC1200_STX);
}
static void
+ao_radio_start_rx(void)
+{
+ ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
+ ao_radio_strobe(CC1200_SRX);
+}
+
+static void
ao_radio_idle(void)
{
for (;;) {
@@ -250,37 +232,40 @@ ao_radio_idle(void)
if (state == CC1200_STATUS_STATE_RX_FIFO_ERROR)
ao_radio_strobe(CC1200_SFRX);
}
- /* Flush any pending TX bytes */
+ /* Flush any pending data in the fifos */
ao_radio_strobe(CC1200_SFTX);
+ ao_radio_strobe(CC1200_SFRX);
+ /* Make sure the RF calibration is current */
+ ao_radio_strobe(CC1200_SCAL);
}
/*
* Packet deviation
*
- * fdev = fosc >> 24 * (256 + dev_m) << dev_e
+ * fdev = fosc >> 22 * (256 + dev_m) << dev_e
*
* Deviation for 38400 baud should be 20.5kHz:
*
- * 32e6Hz / (2 ** 24) * (256 + 80) * (2 ** 5) = 20508Hz
+ * 40e6 / (2 ** 22) * (256 + 13) * (2 ** 3) = 20523Hz
*
* Deviation for 9600 baud should be 5.125kHz:
*
- * 32e6Hz / (2 ** 24) * (256 + 80) * (2 ** 3) = 5127Hz
+ * 40e6 / (2 ** 22) * (256 + 13) * (2 ** 1) = 5131Hz
*
* Deviation for 2400 baud should be 1.28125kHz, but cc1111 and
* cc115l can't do that, so we'll use 1.5kHz instead:
*
- * 32e6Hz / (2 ** 24) * (256 + 137) * (2 ** 1) = 1499Hz
+ * 40e6 / (2 ** 21) * (79) = 1506Hz
*/
-#define PACKET_DEV_M_384 80
-#define PACKET_DEV_E_384 5
+#define PACKET_DEV_M_384 13
+#define PACKET_DEV_E_384 3
-#define PACKET_DEV_M_96 80
-#define PACKET_DEV_E_96 3
+#define PACKET_DEV_M_96 13
+#define PACKET_DEV_E_96 1
-#define PACKET_DEV_M_24 137
-#define PACKET_DEV_E_24 1
+#define PACKET_DEV_M_24 79
+#define PACKET_DEV_E_24 0
/*
* For our packet data
@@ -299,37 +284,37 @@ ao_radio_idle(void)
*
* Symbol rate 38400 Baud:
*
- * DATARATE_M = 239914
- * DATARATE_E = 9
- * CHANBW = 79.4 (79.4)
+ * DATARATE_M = 1013008
+ * DATARATE_E = 8
+ * CHANBW = 104.16667
*
* Symbol rate 9600 Baud:
*
- * DATARATE_M = 239914
- * DATARATE_E = 7
- * CHANBW = 19.9 (round to 19.8)
+ * DATARATE_M = 1013008
+ * DATARATE_E = 6
+ * CHANBW = 26.042 (round to 19.8)
*
* Symbol rate 2400 Baud:
*
- * DATARATE_M = 239914
- * DATARATE_E = 5
+ * DATARATE_M = 1013008
+ * DATARATE_E = 4
* CHANBW = 5.0 (round to 9.5)
*/
-#define PACKET_SYMBOL_RATE_M 239914
+#define PACKET_SYMBOL_RATE_M 1013008
-#define PACKET_SYMBOL_RATE_E_384 9
+#define PACKET_SYMBOL_RATE_E_384 8
/* 200 / 2 = 100 */
#define PACKET_CHAN_BW_384 ((CC1200_CHAN_BW_ADC_CIC_DECFACT_12 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
- (21 << CC1200_CHAN_BW_BB_CIC_DECFACT))
+ (16 << CC1200_CHAN_BW_BB_CIC_DECFACT))
-#define PACKET_SYMBOL_RATE_E_96 7
+#define PACKET_SYMBOL_RATE_E_96 6
/* 200 / 10 = 20 */
#define PACKET_CHAN_BW_96 ((CC1200_CHAN_BW_ADC_CIC_DECFACT_48 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
- (21 << CC1200_CHAN_BW_BB_CIC_DECFACT))
+ (16 << CC1200_CHAN_BW_BB_CIC_DECFACT))
-#define PACKET_SYMBOL_RATE_E_24 5
+#define PACKET_SYMBOL_RATE_E_24 4
/* 200 / 25 = 8 */
#define PACKET_CHAN_BW_24 ((CC1200_CHAN_BW_ADC_CIC_DECFACT_48 << CC1200_CHAN_BW_ADC_CIC_DECFACT) | \
(44 << CC1200_CHAN_BW_BB_CIC_DECFACT))
@@ -337,17 +322,17 @@ ao_radio_idle(void)
static const uint16_t packet_setup[] = {
CC1200_SYMBOL_RATE1, ((PACKET_SYMBOL_RATE_M >> 8) & 0xff),
CC1200_SYMBOL_RATE0, ((PACKET_SYMBOL_RATE_M >> 0) & 0xff),
- CC1200_PKT_CFG2, ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
- (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
- CC1200_PKT_CFG1, ((0 << CC1200_PKT_CFG1_WHITE_DATA) |
- (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
- (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
- (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
- CC1200_PKT_CFG0, ((0 << CC1200_PKT_CFG0_RESERVED7) |
- (CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
- (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
- (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
- (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
+ CC1200_PKT_CFG2, /* Packet Configuration Reg. 2 */
+ ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
+ (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
+ (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
+ CC1200_PKT_CFG1, /* Packet Configuration Reg. 1 */
+ ((1 << CC1200_PKT_CFG1_FEC_EN) |
+ (1 << CC1200_PKT_CFG1_WHITE_DATA) |
+ (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
+ (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES << CC1200_PKT_CFG1_CRC_CFG) |
+ (1 << CC1200_PKT_CFG1_APPEND_STATUS)),
CC1200_PREAMBLE_CFG1, ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
(CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
};
@@ -357,10 +342,14 @@ static const uint16_t packet_setup_384[] = {
CC1200_MODCFG_DEV_E, ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
(CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
(PACKET_DEV_E_384 << CC1200_MODCFG_DEV_E_DEV_E)),
- CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_384 << CC1200_SYMBOL_RATE2_DATARATE_E) |
+ CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_384 << CC1200_SYMBOL_RATE2_DATARATE_E) |
(((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
CC1200_CHAN_BW, PACKET_CHAN_BW_384,
- CC1200_PA_CFG0, 0x7b,
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
};
static const uint16_t packet_setup_96[] = {
@@ -368,10 +357,14 @@ static const uint16_t packet_setup_96[] = {
CC1200_MODCFG_DEV_E, ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
(CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
(PACKET_DEV_E_96 << CC1200_MODCFG_DEV_E_DEV_E)),
- CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_96 << CC1200_SYMBOL_RATE2_DATARATE_E) |
+ CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_96 << CC1200_SYMBOL_RATE2_DATARATE_E) |
(((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
CC1200_CHAN_BW, PACKET_CHAN_BW_96,
- CC1200_PA_CFG0, 0x7d,
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (CC1200_MDMCFG2_UPSAMPLER_P_32 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
};
static const uint16_t packet_setup_24[] = {
@@ -379,34 +372,27 @@ static const uint16_t packet_setup_24[] = {
CC1200_MODCFG_DEV_E, ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
(CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
(PACKET_DEV_E_24 << CC1200_MODCFG_DEV_E_DEV_E)),
- CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_24 << CC1200_SYMBOL_RATE2_DATARATE_E) |
+ CC1200_SYMBOL_RATE2, ((PACKET_SYMBOL_RATE_E_24 << CC1200_SYMBOL_RATE2_DATARATE_E) |
(((PACKET_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
CC1200_CHAN_BW, PACKET_CHAN_BW_24,
- CC1200_PA_CFG0, 0x7e,
-};
-
-static const uint16_t packet_tx_setup[] = {
- CC1200_PKT_CFG2, ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
- (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
- AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_RX0TX1_CFG,
-};
-
-static const uint16_t packet_rx_setup[] = {
- CC1200_PKT_CFG2, ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
- (CC1200_PKT_CFG2_PKT_FORMAT_SYNCHRONOUS_SERIAL << CC1200_PKT_CFG2_PKT_FORMAT)),
- AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_CLKEN_SOFT,
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (CC1200_MDMCFG2_UPSAMPLER_P_64 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
};
/*
- * RDF deviation is 5kHz
+ * RDF deviation is 3kHz
*
- * fdev = fosc >> 24 * (256 + dev_m) << dev_e
+ * fdev = fosc >> 22 * (256 + dev_m) << dev_e dev_e != 0
+ * fdev = fosc >> 21 * dev_m dev_e == 0
*
- * 32e6Hz / (2 ** 24) * (256 + 71) * (2 ** 3) = 4989
+ * 40e6 / (2 ** 21) * 157 = 2995Hz
*/
-#define RDF_DEV_E 3
-#define RDF_DEV_M 71
+#define RDF_DEV_E 0
+#define RDF_DEV_M 157
/*
* For our RDF beacon, set the symbol rate to 2kBaud (for a 1kHz tone)
@@ -415,13 +401,13 @@ static const uint16_t packet_rx_setup[] = {
* Rdata = -------------------------------------- * fosc
* 2 ** 39
*
- * DATARATE_M = 25166
- * DATARATE_E = 5
+ * DATARATE_M = 669411
+ * DATARATE_E = 4
*
* To make the tone last for 200ms, we need 2000 * .2 = 400 bits or 50 bytes
*/
-#define RDF_SYMBOL_RATE_E 5
-#define RDF_SYMBOL_RATE_M 25166
+#define RDF_SYMBOL_RATE_E 4
+#define RDF_SYMBOL_RATE_M 669411
#define RDF_PACKET_LEN 50
static const uint16_t rdf_setup[] = {
@@ -429,36 +415,42 @@ static const uint16_t rdf_setup[] = {
CC1200_MODCFG_DEV_E, ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
(CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
(RDF_DEV_E << CC1200_MODCFG_DEV_E_DEV_E)),
- CC1200_SYMBOL_RATE2, ((RDF_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
+ CC1200_SYMBOL_RATE2, ((RDF_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
(((RDF_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
- CC1200_SYMBOL_RATE1, ((RDF_SYMBOL_RATE_M >> 8) & 0xff),
- CC1200_SYMBOL_RATE0, ((RDF_SYMBOL_RATE_M >> 0) & 0xff),
- CC1200_PKT_CFG2, ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
- (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
- CC1200_PKT_CFG1, ((0 << CC1200_PKT_CFG1_WHITE_DATA) |
- (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
- (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
- (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
- CC1200_PKT_CFG0, ((0 << CC1200_PKT_CFG0_RESERVED7) |
- (CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
- (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
- (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
- (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
- CC1200_PREAMBLE_CFG1, ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
- (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
- CC1200_PA_CFG0, 0x7e,
+ CC1200_SYMBOL_RATE1, ((RDF_SYMBOL_RATE_M >> 8) & 0xff),
+ CC1200_SYMBOL_RATE0, ((RDF_SYMBOL_RATE_M >> 0) & 0xff),
+ CC1200_PKT_CFG2, /* Packet Configuration Reg. 2 */
+ ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
+ (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
+ (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
+ CC1200_PKT_CFG1, /* Packet Configuration Reg. 1 */
+ ((0 << CC1200_PKT_CFG1_FEC_EN) |
+ (0 << CC1200_PKT_CFG1_WHITE_DATA) |
+ (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
+ (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
+ (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
+ CC1200_PREAMBLE_CFG1,
+ ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((0 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (12 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
};
/*
* APRS deviation is 3kHz
*
- * fdev = fosc >> 24 * (256 + dev_m) << dev_e
+ * fdev = fosc >> 22 * (256 + dev_m) << dev_e dev_e != 0
+ * fdev = fosc >> 21 * dev_m dev_e == 0
*
- * 32e6Hz / (2 ** 24) * (256 + 137) * (2 ** 2) = 2998Hz
+ * 40e6 / (2 ** 21) * 157 = 2995Hz
*/
-#define APRS_DEV_E 2
-#define APRS_DEV_M 137
+#define APRS_DEV_E 0
+#define APRS_DEV_M 157
/*
* For our APRS beacon, set the symbol rate to 9.6kBaud (8x oversampling for 1200 baud data rate)
@@ -467,33 +459,48 @@ static const uint16_t rdf_setup[] = {
* Rdata = -------------------------------------- * fosc
* 2 ** 39
*
- * DATARATE_M = 239914
- * DATARATE_E = 7
+ * DATARATE_M = 1013008
+ * DATARATE_E = 6
*
* Rdata = 9599.998593330383301
*
*/
-#define APRS_SYMBOL_RATE_E 7
-#define APRS_SYMBOL_RATE_M 239914
+#define APRS_SYMBOL_RATE_E 6
+#define APRS_SYMBOL_RATE_M 1013008
static const uint16_t aprs_setup[] = {
CC1200_DEVIATION_M, APRS_DEV_M,
CC1200_MODCFG_DEV_E, ((CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1200_MODCFG_DEV_E_MODEM_MODE) |
(CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1200_MODCFG_DEV_E_MOD_FORMAT) |
(APRS_DEV_E << CC1200_MODCFG_DEV_E_DEV_E)),
- CC1200_SYMBOL_RATE2, ((APRS_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
+ CC1200_SYMBOL_RATE2, ((APRS_SYMBOL_RATE_E << CC1200_SYMBOL_RATE2_DATARATE_E) |
(((APRS_SYMBOL_RATE_M >> 16) & CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK) << CC1200_SYMBOL_RATE2_DATARATE_M_19_16)),
- CC1200_SYMBOL_RATE1, ((APRS_SYMBOL_RATE_M >> 8) & 0xff),
- CC1200_SYMBOL_RATE0, ((APRS_SYMBOL_RATE_M >> 0) & 0xff),
- CC1200_PKT_CFG2, ((CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
- (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
- CC1200_PKT_CFG1, ((0 << CC1200_PKT_CFG1_WHITE_DATA) |
- (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
- (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
- (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
- CC1200_PREAMBLE_CFG1, ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
- (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
- CC1200_PA_CFG0, 0x7d,
+ CC1200_SYMBOL_RATE1, ((APRS_SYMBOL_RATE_M >> 8) & 0xff),
+ CC1200_SYMBOL_RATE0, ((APRS_SYMBOL_RATE_M >> 0) & 0xff),
+ CC1200_PKT_CFG2, /* Packet Configuration Reg. 2 */
+ ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
+ (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
+ (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
+ CC1200_PKT_CFG1, /* Packet Configuration Reg. 1 */
+ ((0 << CC1200_PKT_CFG1_FEC_EN) |
+ (0 << CC1200_PKT_CFG1_WHITE_DATA) |
+ (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
+ (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1200_PKT_CFG1_CRC_CFG_DISABLED << CC1200_PKT_CFG1_CRC_CFG) |
+ (0 << CC1200_PKT_CFG1_APPEND_STATUS)),
+ CC1200_PKT_CFG0, /* Packet Configuration Reg. 0 */
+ ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
+ (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
+ (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
+ (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
+ CC1200_PREAMBLE_CFG1,
+ ((CC1200_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1200_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
};
/*
@@ -521,14 +528,12 @@ static const uint16_t test_setup[] = {
(CC1200_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1200_PREAMBLE_CFG1_PREAMBLE_WORD)),
};
-#define AO_PKT_CFG0_INFINITE ((0 << CC1200_PKT_CFG0_RESERVED7) | \
- (CC1200_PKT_CFG0_LENGTH_CONFIG_INFINITE << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
+#define AO_PKT_CFG0_INFINITE ((CC1200_PKT_CFG0_LENGTH_CONFIG_INFINITE << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
(0 << CC1200_PKT_CFG0_PKG_BIT_LEN) | \
(0 << CC1200_PKT_CFG0_UART_MODE_EN) | \
(0 << CC1200_PKT_CFG0_UART_SWAP_EN))
-#define AO_PKT_CFG0_FIXED ((0 << CC1200_PKT_CFG0_RESERVED7) | \
- (CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
+#define AO_PKT_CFG0_FIXED ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) | \
(0 << CC1200_PKT_CFG0_PKG_BIT_LEN) | \
(0 << CC1200_PKT_CFG0_UART_MODE_EN) | \
(0 << CC1200_PKT_CFG0_UART_SWAP_EN))
@@ -536,10 +541,9 @@ static const uint16_t test_setup[] = {
static uint16_t ao_radio_mode;
#define AO_RADIO_MODE_BITS_PACKET 1
-#define AO_RADIO_MODE_BITS_PACKET_TX 2
#define AO_RADIO_MODE_BITS_TX_BUF 4
#define AO_RADIO_MODE_BITS_TX_FINISH 8
-#define AO_RADIO_MODE_BITS_PACKET_RX 16
+#define AO_RADIO_MODE_BITS_RX 16
#define AO_RADIO_MODE_BITS_RDF 32
#define AO_RADIO_MODE_BITS_APRS 64
#define AO_RADIO_MODE_BITS_TEST 128
@@ -547,14 +551,13 @@ static uint16_t ao_radio_mode;
#define AO_RADIO_MODE_BITS_FIXED 512
#define AO_RADIO_MODE_NONE 0
-#define AO_RADIO_MODE_PACKET_TX_BUF (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_TX | AO_RADIO_MODE_BITS_TX_BUF)
-#define AO_RADIO_MODE_PACKET_TX_FINISH (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_TX | AO_RADIO_MODE_BITS_TX_FINISH)
-#define AO_RADIO_MODE_PACKET_RX (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_RX)
-#define AO_RADIO_MODE_RDF (AO_RADIO_MODE_BITS_RDF | AO_RADIO_MODE_BITS_TX_FINISH)
-#define AO_RADIO_MODE_APRS_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
-#define AO_RADIO_MODE_APRS_LAST_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_BUF)
-#define AO_RADIO_MODE_APRS_FINISH (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
-#define AO_RADIO_MODE_TEST (AO_RADIO_MODE_BITS_TEST | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_PACKET_TX (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_PACKET_RX (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_RX)
+#define AO_RADIO_MODE_RDF (AO_RADIO_MODE_BITS_RDF | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_APRS_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_APRS_LAST_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_APRS_FINISH (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_TEST (AO_RADIO_MODE_BITS_TEST | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
static void
_ao_radio_set_regs(const uint16_t *regs, int nreg)
@@ -596,17 +599,20 @@ ao_radio_set_mode(uint16_t new_mode)
}
}
- if (changes & AO_RADIO_MODE_BITS_PACKET_TX)
- ao_radio_set_regs(packet_tx_setup);
-
- if (changes & AO_RADIO_MODE_BITS_TX_BUF)
+ if (changes & AO_RADIO_MODE_BITS_TX_BUF) {
ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_TXFIFO_THR);
+ ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH);
+ }
- if (changes & AO_RADIO_MODE_BITS_TX_FINISH)
- ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_RX0TX1_CFG);
+ if (changes & AO_RADIO_MODE_BITS_TX_FINISH) {
+ ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_PKT_SYNC_RXTX);
+ ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH);
+ }
- if (changes & AO_RADIO_MODE_BITS_PACKET_RX)
- ao_radio_set_regs(packet_rx_setup);
+ if (changes & AO_RADIO_MODE_BITS_RX) {
+ ao_radio_reg_write(AO_CC1200_INT_GPIO_IOCFG, CC1200_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP);
+ ao_exti_set_mode(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN, AO_EXTI_MODE_RISING|AO_EXTI_PRIORITY_HIGH);
+ }
if (changes & AO_RADIO_MODE_BITS_RDF)
ao_radio_set_regs(rdf_setup);
@@ -635,12 +641,14 @@ static uint8_t ao_radio_configured = 0;
static void
ao_radio_setup(void)
{
-// ao_radio_strobe(CC1200_SRES);
+ ao_radio_strobe(CC1200_SRES);
ao_radio_set_regs(radio_setup);
ao_radio_mode = 0;
+ ao_radio_idle();
+
ao_config_get();
ao_radio_configured = 1;
@@ -672,6 +680,7 @@ ao_radio_get(uint8_t len)
ao_radio_reg_write(CC1200_FREQ1, ao_config.radio_setting >> 8);
ao_radio_reg_write(CC1200_FREQ0, ao_config.radio_setting);
last_radio_setting = ao_config.radio_setting;
+ ao_radio_strobe(CC1200_SCAL);
}
if (ao_config.radio_rate != last_radio_rate) {
ao_radio_mode &= ~AO_RADIO_MODE_BITS_PACKET;
@@ -682,6 +691,43 @@ ao_radio_get(uint8_t len)
#define ao_radio_put() ao_mutex_put(&ao_radio_mutex)
+static inline uint8_t
+ao_radio_state(void)
+{
+ return (ao_radio_status() >> CC1200_STATUS_STATE) & CC1200_STATUS_STATE_MASK;
+}
+
+#if CC1200_DEBUG
+void
+ao_radio_show_state(char *where)
+{
+ printf("%s: state %d len %d rxbytes %d\n",
+ where, ao_radio_state(),
+ ao_radio_reg_read(CC1200_PKT_LEN),
+ ao_radio_reg_read(CC1200_NUM_RXBYTES));
+}
+#else
+#define ao_radio_show_state(where)
+#endif
+
+/* Wait for the radio to signal an interrupt
+ */
+static void
+ao_radio_wait_isr(uint16_t timeout)
+{
+ if (timeout)
+ ao_alarm(timeout);
+
+ ao_arch_block_interrupts();
+ while (!ao_radio_wake && !ao_radio_abort)
+ if (ao_sleep(&ao_radio_wake))
+ ao_radio_abort = 1;
+ ao_arch_release_interrupts();
+
+ if (timeout)
+ ao_clear_alarm();
+}
+
static void
ao_rdf_start(uint8_t len)
{
@@ -690,20 +736,15 @@ ao_rdf_start(uint8_t len)
ao_radio_set_mode(AO_RADIO_MODE_RDF);
ao_radio_wake = 0;
-
}
static void
-ao_rdf_run(void)
+ao_radio_run(void)
{
+ ao_radio_wake = 0;
+ ao_radio_abort = 0;
ao_radio_start_tx();
-
- ao_arch_block_interrupts();
- while (!ao_radio_wake && !ao_radio_abort && !ao_radio_mcu_wake)
- ao_sleep(&ao_radio_wake);
- ao_arch_release_interrupts();
- if (ao_radio_mcu_wake)
- ao_radio_check_marc_status();
+ ao_radio_wait_isr(0);
if (!ao_radio_wake)
ao_radio_idle();
ao_radio_put();
@@ -716,7 +757,7 @@ ao_radio_rdf(void)
ao_radio_fifo_write_fixed(ao_radio_rdf_value, AO_RADIO_RDF_LEN);
- ao_rdf_run();
+ ao_radio_run();
}
void
@@ -738,7 +779,7 @@ ao_radio_continuity(uint8_t c)
ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_PAUSE_LEN);
status = ao_radio_fifo_write_stop(status);
(void) status;
- ao_rdf_run();
+ ao_radio_run();
}
void
@@ -794,29 +835,18 @@ ao_radio_test_cmd(void)
}
}
-static void
-ao_radio_wait_isr(uint16_t timeout)
-{
- if (timeout)
- ao_alarm(timeout);
- ao_arch_block_interrupts();
- while (!ao_radio_wake && !ao_radio_mcu_wake && !ao_radio_abort)
- if (ao_sleep(&ao_radio_wake))
- ao_radio_abort = 1;
- ao_arch_release_interrupts();
- if (timeout)
- ao_clear_alarm();
- if (ao_radio_mcu_wake)
- ao_radio_check_marc_status();
-}
-
void
ao_radio_send(const void *d, uint8_t size)
{
- (void) d;
- (void) size;
+ ao_radio_get(size);
+ ao_radio_set_mode(AO_RADIO_MODE_PACKET_TX);
+
+ ao_radio_fifo_write(d, size);
+
+ ao_radio_run();
}
+
#define AO_RADIO_LOTS 64
void
@@ -829,6 +859,7 @@ ao_radio_send_aprs(ao_radio_fill_func fill)
uint8_t started = 0;
uint8_t fifo_space;
+ ao_radio_abort = 0;
ao_radio_get(0xff);
fifo_space = CC1200_FIFO_SIZE;
while (!done) {
@@ -837,6 +868,9 @@ ao_radio_send_aprs(ao_radio_fill_func fill)
done = 1;
cnt = -cnt;
}
+#if CC1200_APRS_TRACE
+ printf("APRS fill %d bytes done %d\n", cnt, done);
+#endif
total += cnt;
/* At the last buffer, set the total length */
@@ -849,8 +883,11 @@ ao_radio_send_aprs(ao_radio_fill_func fill)
/* Wait for some space in the fifo */
while (!ao_radio_abort && (fifo_space = ao_radio_tx_fifo_space()) == 0) {
+#if CC1200_APRS_TRACE
+ printf("APRS space %d cnt %d\n", fifo_space, cnt); flush();
+#endif
ao_radio_wake = 0;
- ao_radio_wait_isr(0);
+ ao_radio_wait_isr(AO_MS_TO_TICKS(1000));
}
if (ao_radio_abort)
break;
@@ -867,33 +904,194 @@ ao_radio_send_aprs(ao_radio_fill_func fill)
} else
ao_radio_set_mode(AO_RADIO_MODE_APRS_BUF);
+ ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
+
ao_radio_fifo_write(b, this_len);
b += this_len;
-
+#if CC1200_APRS_TRACE
+ printf("APRS write fifo %d space now %d\n", this_len, ao_radio_tx_fifo_space());
+#endif
if (!started) {
- ao_radio_start_tx();
+#if CC1200_APRS_TRACE
+ printf("APRS start\n");
+#endif
+ ao_radio_strobe(CC1200_STX);
+#if CC1200_APRS_TRACE
+ { int t;
+ for (t = 0; t < 20; t++) {
+ uint8_t status = ao_radio_status();
+ uint8_t space = ao_radio_tx_fifo_space();
+ printf ("status: %02x fifo %d\n", status, space);
+ if ((status >> 4) == 2)
+ break;
+ ao_delay(AO_MS_TO_TICKS(0));
+ }
+ }
+#endif
started = 1;
- } else
- ao_exti_enable(AO_CC1200_INT_PORT, AO_CC1200_INT_PIN);
+ }
}
if (ao_radio_abort) {
ao_radio_idle();
break;
}
- /* Wait for the transmitter to go idle */
- ao_radio_wake = 0;
- ao_radio_wait_isr(0);
}
+ /* Wait for the transmitter to go idle */
+ ao_radio_wake = 0;
+#if CC1200_APRS_TRACE
+ printf("APRS wait idle\n"); flush();
+#endif
+ ao_radio_wait_isr(AO_MS_TO_TICKS(1000));
+#if CC1200_APRS_TRACE
+ printf("APRS abort %d\n", ao_radio_abort);
+#endif
ao_radio_put();
}
+#if 0
+static uint8_t
+ao_radio_marc_state(void)
+{
+ return ao_radio_reg_read(CC1200_MARCSTATE);
+}
+
+static uint8_t
+ao_radio_modem_status1(void)
+{
+ return ao_radio_reg_read(CC1200_MODEM_STATUS1);
+}
+
+static uint8_t
+ao_radio_modem_status0(void)
+{
+ return ao_radio_reg_read(CC1200_MODEM_STATUS0);
+}
+
+struct ao_radio_state {
+ char where[4];
+ uint8_t marc_state;
+ uint8_t marc_status1;
+ uint8_t marc_status0;
+ uint8_t modem_status1;
+ uint8_t modem_status0;
+};
+
+static void
+ao_radio_fill_state(char *where, struct ao_radio_state *s)
+{
+ strcpy(s->where, where);
+ s->marc_state = ao_radio_marc_state();
+ s->marc_status1 = ao_radio_reg_read(CC1200_MARC_STATUS1);
+ s->marc_status0 = ao_radio_reg_read(CC1200_MARC_STATUS0);
+ s->modem_status1 = ao_radio_modem_status1();
+ s->modem_status0 = ao_radio_modem_status0();
+}
+
+static void
+ao_radio_dump_state(struct ao_radio_state *s)
+{
+ printf ("%s: marc %2x marc1 %2x marc0 %2x modem1 %2x modem0 %2x\n",
+ s->where, s->marc_state, s->marc_status1, s->marc_status0, s->modem_status1, s->modem_status0);
+}
+#endif
+
uint8_t
ao_radio_recv(__xdata void *d, uint8_t size, uint8_t timeout)
{
- (void) d;
- (void) size;
- (void) timeout;
- return 0;
+ uint8_t success = 0;
+
+ ao_radio_abort = 0;
+ ao_radio_get(size - 2);
+ ao_radio_set_mode(AO_RADIO_MODE_PACKET_RX);
+ ao_radio_wake = 0;
+ ao_radio_start_rx();
+
+ while (!ao_radio_abort) {
+ ao_radio_wait_isr(timeout);
+ if (ao_radio_wake) {
+ uint8_t marc_status1 = ao_radio_reg_read(CC1200_MARC_STATUS1);
+
+ /* Check the receiver status to see what happened
+ */
+ switch (marc_status1) {
+ case CC1200_MARC_STATUS1_RX_FINISHED:
+ case CC1200_MARC_STATUS1_ADDRESS:
+ case CC1200_MARC_STATUS1_CRC:
+ /* Normal return, go fetch the bytes from the FIFO
+ * and give them back to the caller
+ */
+ success = 1;
+ break;
+ case CC1200_MARC_STATUS1_RX_TIMEOUT:
+ case CC1200_MARC_STATUS1_RX_TERMINATION:
+ case CC1200_MARC_STATUS1_EWOR_SYNC_LOST:
+ case CC1200_MARC_STATUS1_MAXIMUM_LENGTH:
+ case CC1200_MARC_STATUS1_RX_FIFO_OVERFLOW:
+ case CC1200_MARC_STATUS1_RX_FIFO_UNDERFLOW:
+ /* Something weird happened; reset the radio and
+ * return failure
+ */
+ success = 0;
+ break;
+ default:
+ /* some other status; go wait for the radio to do something useful
+ */
+ continue;
+ }
+ break;
+ } else {
+ uint8_t modem_status1 = ao_radio_reg_read(CC1200_MODEM_STATUS1);
+
+ /* Check to see if the packet header has been seen, in which case we'll
+ * want to keep waiting for the rest of the packet to appear
+ */
+ if (modem_status1 & (1 << CC1200_MODEM_STATUS1_SYNC_FOUND))
+ {
+ ao_radio_abort = 0;
+
+ /* Set a timeout based on the packet length so that we make sure to
+ * wait long enough to receive the whole thing.
+ *
+ * timeout = bits * FEC expansion / rate
+ */
+ switch (ao_config.radio_rate) {
+ default:
+ case AO_RADIO_RATE_38400:
+ timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 384) + 1;
+ break;
+ case AO_RADIO_RATE_9600:
+ timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 96) + 1;
+ break;
+ case AO_RADIO_RATE_2400:
+ timeout = AO_MS_TO_TICKS(size * (8 * 2 * 10) / 24) + 1;
+ break;
+ }
+ }
+ }
+ }
+
+ if (success) {
+ int8_t rssi;
+ uint8_t status;
+
+ status = ao_radio_fifo_read(d, size);
+ (void) status;
+ rssi = ((int8_t *) d)[size - 2];
+ ao_radio_rssi = rssi;
+
+ /* Bound it to the representable range */
+ if (rssi > -11)
+ rssi = -11;
+
+ /* Write it back to the packet */
+ ((int8_t *) d)[size-2] = AO_RADIO_FROM_RSSI(rssi);
+ } else {
+ ao_radio_idle();
+ ao_radio_rssi = 0;
+ }
+
+ ao_radio_put();
+ return success;
}
@@ -932,6 +1130,7 @@ static const struct ao_cc1200_reg ao_cc1200_reg[] = {
{ .addr = CC1200_PREAMBLE_CFG0, .name = "PREAMBLE_CFG0" },
{ .addr = CC1200_IQIC, .name = "IQIC" },
{ .addr = CC1200_CHAN_BW, .name = "CHAN_BW" },
+ { .addr = CC1200_MDMCFG2, .name = "MDMCFG2" },
{ .addr = CC1200_MDMCFG1, .name = "MDMCFG1" },
{ .addr = CC1200_MDMCFG0, .name = "MDMCFG0" },
{ .addr = CC1200_SYMBOL_RATE2, .name = "SYMBOL_RATE2" },
@@ -1064,8 +1263,8 @@ static const struct ao_cc1200_reg ao_cc1200_reg[] = {
{ .addr = CC1200_PARTNUMBER, .name = "PARTNUMBER" },
{ .addr = CC1200_PARTVERSION, .name = "PARTVERSION" },
{ .addr = CC1200_SERIAL_STATUS, .name = "SERIAL_STATUS" },
- { .addr = CC1200_RX_STATUS, .name = "RX_STATUS" },
- { .addr = CC1200_TX_STATUS, .name = "TX_STATUS" },
+ { .addr = CC1200_MODEM_STATUS1, .name = "MODEM_STATUS1" },
+ { .addr = CC1200_MODEM_STATUS0, .name = "MODEM_STATUS0" },
{ .addr = CC1200_MARC_STATUS1, .name = "MARC_STATUS1" },
{ .addr = CC1200_MARC_STATUS0, .name = "MARC_STATUS0" },
{ .addr = CC1200_PA_IFAMP_TEST, .name = "PA_IFAMP_TEST" },
@@ -1091,11 +1290,17 @@ static const struct ao_cc1200_reg ao_cc1200_reg[] = {
#define AO_NUM_CC1200_REG (sizeof ao_cc1200_reg / sizeof ao_cc1200_reg[0])
+static uint8_t
+ao_radio_get_marc_status(void)
+{
+ return ao_radio_reg_read(CC1200_MARC_STATUS1);
+}
+
static void ao_radio_show(void) {
- uint8_t status = ao_radio_status();
+ uint8_t status;
unsigned int i;
- ao_radio_get(0xff);
+ ao_mutex_get(&ao_radio_mutex);
status = ao_radio_status();
printf ("Status: %02x\n", status);
printf ("CHIP_RDY: %d\n", (status >> CC1200_STATUS_CHIP_RDY) & 1);
@@ -1141,6 +1346,8 @@ ao_radio_test_recv(void)
printf (" RSSI %d", AO_RSSI_FROM_RADIO(bytes[32]));
for (b = 0; b < 32; b++)
printf (" %02x", bytes[b]);
+
+ printf (" RSSI %02x LQI %02x", bytes[32], bytes[33]);
printf ("\n");
}
}
@@ -1151,12 +1358,15 @@ ao_radio_test_recv(void)
static void
ao_radio_aprs(void)
{
+#if PACKET_HAS_SLAVE
ao_packet_slave_stop();
+#endif
ao_aprs_send();
}
#endif
#endif
+#if CC1200_LOW_LEVEL_DEBUG
static void
ao_radio_strobe_test(void)
{
@@ -1204,6 +1414,7 @@ ao_radio_read_test(void)
data = ao_radio_reg_read(addr);
printf ("Read %04x = %02x\n", addr, data);
}
+#endif
static const struct ao_cmds ao_radio_cmds[] = {
{ ao_radio_test_cmd, "C <1 start, 0 stop, none both>\0Radio carrier test" },
@@ -1216,9 +1427,11 @@ static const struct ao_cmds ao_radio_cmds[] = {
{ ao_radio_packet, "p\0Send a test packet" },
{ ao_radio_test_recv, "q\0Recv a test packet" },
#endif
- { ao_radio_strobe_test, "S <value>\0Strobe radio" },
+#if CC1200_LOW_LEVEL_DEBUG
+ { ao_radio_strobe_test, "A <value>\0Strobe radio" },
{ ao_radio_write_test, "W <addr> <value>\0Write radio reg" },
- { ao_radio_read_test, "R <addr>\0Read radio reg" },
+ { ao_radio_read_test, "B <addr>\0Read radio reg" },
+#endif
{ 0, NULL }
};
diff --git a/src/drivers/ao_cc1200.h b/src/drivers/ao_cc1200.h
index 987f9bda..b04775fd 100644
--- a/src/drivers/ao_cc1200.h
+++ b/src/drivers/ao_cc1200.h
@@ -27,7 +27,7 @@
#define CC1200_IOCFG_GPIO_INV 6
#define CC1200_IOCFG_GPIO_CFG 0
#define CC1200_IOCFG_GPIO_CFG_RXFIFO_THR 0
-#define CC1200_IOCFG_GPIO_CFG_RXFIFO_THR_PKT 1
+#define CC1200_IOCFG_GPIO_CFG_RXFIFO_THR_PKT 1
#define CC1200_IOCFG_GPIO_CFG_TXFIFO_THR 2
#define CC1200_IOCFG_GPIO_CFG_TXFIFO_THR_PKT 3
#define CC1200_IOCFG_GPIO_CFG_RXFIFO_OVERFLOW 4
@@ -101,7 +101,6 @@
#define CC1200_IOCFG_GPIO_CFG_EXT_OSC_EN 60
#define CC1200_IOCFG_GPIO_CFG_MASK 0x3f
-#define CC1200_IOCFG3 0x00
#define CC1200_IOCFG2 0x01
#define CC1200_IOCFG1 0x02
#define CC1200_IOCFG0 0x03
@@ -141,21 +140,21 @@
#define CC1200_DEVIATION_M 0x0a
#define CC1200_MODCFG_DEV_E 0x0b
-#define CC1200_MODCFG_DEV_E_MODEM_MODE 6
+#define CC1200_MODCFG_DEV_E_MODEM_MODE 6
#define CC1200_MODCFG_DEV_E_MODEM_MODE_NORMAL 0
#define CC1200_MODCFG_DEV_E_MODEM_MODE_DSSS_REPEAT 1
#define CC1200_MODCFG_DEV_E_MODEM_MODE_DSSS_PN 2
#define CC1200_MODCFG_DEV_E_MODEM_MODE_CARRIER_SENSE 3
#define CC1200_MODCFG_DEV_E_MODEM_MODE_MASK 3
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT 3
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_FSK 0
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK 1
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_ASK_OOK 3
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_FSK 4
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_GFSK 5
-#define CC1200_MODCFG_DEV_E_MOD_FORMAT_MASK 7
-#define CC1200_MODCFG_DEV_E_DEV_E 0
-#define CC1200_MODCFG_DEV_E_DEV_E_MASK 7
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT 3
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_FSK 0
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_2_GFSK 1
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_ASK_OOK 3
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_FSK 4
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_4_GFSK 5
+#define CC1200_MODCFG_DEV_E_MOD_FORMAT_MASK 7
+#define CC1200_MODCFG_DEV_E_DEV_E 0
+#define CC1200_MODCFG_DEV_E_DEV_E_MASK 7
#define CC1200_DCFILT_CFG 0x0c
#define CC1200_PREAMBLE_CFG1 0x0d
@@ -226,10 +225,10 @@
#define CC1200_MDMCFG0_VITERBI_EN 2
#define CC1200_SYMBOL_RATE2 0x13
-#define CC1200_SYMBOL_RATE2_DATARATE_E 4
-#define CC1200_SYMBOL_RATE2_DATARATE_E_MASK 0xf
-#define CC1200_SYMBOL_RATE2_DATARATE_M_19_16 0
-#define CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK 0xf
+#define CC1200_SYMBOL_RATE2_DATARATE_E 4
+#define CC1200_SYMBOL_RATE2_DATARATE_E_MASK 0xf
+#define CC1200_SYMBOL_RATE2_DATARATE_M_19_16 0
+#define CC1200_SYMBOL_RATE2_DATARATE_M_19_16_MASK 0xf
#define CC1200_SYMBOL_RATE1 0x14
#define CC1200_SYMBOL_RATE0 0x15
@@ -338,6 +337,8 @@
#define CC1200_WOR_EVENT0_LSB 0x24
#define CC1200_RXDCM_TIME 0x25
#define CC1200_PKT_CFG2 0x26
+#define CC1200_PKT_CFG2_BYTE_SWAP_EN 6
+#define CC1200_PKT_CFG2_FG_MODE_EN 5
#define CC1200_PKT_CFG2_CCA_MODE 2
#define CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR 0
#define CC1200_PKT_CFG2_CCA_MODE_RSSI_THRESHOLD 1
@@ -353,19 +354,20 @@
#define CC1200_PKT_CFG2_PKT_FORMAT_MASK 3
#define CC1200_PKT_CFG1 0x27
+#define CC1200_PKT_CFG1_FEC_EN 7
#define CC1200_PKT_CFG1_WHITE_DATA 6
-#define CC1200_PKT_CFG1_ADDR_CHECK_CFG 4
+#define CC1200_PKT_CFG1_PN9_SWAP_EN 5
+#define CC1200_PKT_CFG1_ADDR_CHECK_CFG 3
#define CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE 0
#define CC1200_PKT_CFG1_ADDR_CHECK_CFG_CHECK 1
#define CC1200_PKT_CFG1_ADDR_CHECK_CFG_00_BROADCAST 2
#define CC1200_PKT_CFG1_ADDR_CHECK_CFG_00_FF_BROADCAST 3
#define CC1200_PKT_CFG1_ADDR_CHECK_CFG_MASK 3
-#define CC1200_PKT_CFG1_CRC_CFG 2
+#define CC1200_PKT_CFG1_CRC_CFG 1
#define CC1200_PKT_CFG1_CRC_CFG_DISABLED 0
#define CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES 1
#define CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ZEROS 2
#define CC1200_PKT_CFG1_CRC_CFG_MASK 3
-#define CC1200_PKT_CFG1_BYTE_SWAP_EN 1
#define CC1200_PKT_CFG1_APPEND_STATUS 0
#define CC1200_PKT_CFG0 0x28
@@ -382,13 +384,29 @@
#define CC1200_PKT_CFG0_UART_SWAP_EN 0
#define CC1200_RFEND_CFG1 0x29
+#define CC1200_RFEND_CFG1_RXOFF_MODE 4
+#define CC1200_RFEND_CFG1_RXOFF_MODE_IDLE 0
+#define CC1200_RFEND_CFG1_RXOFF_MODE_FSTXON 1
+#define CC1200_RFEND_CFG1_RXOFF_MODE_TX 2
+#define CC1200_RFEND_CFG1_RXOFF_MODE_RX 3
+#define CC1200_RFEND_CFG1_RX_TIME 1
+#define CC1200_RFEND_CFG1_RX_TIME_INFINITE 7
+#define CC1200_RFEND_CFG1_RX_TIME_QUAL 0
#define CC1200_RFEND_CFG0 0x2a
+#define CC1200_RFEND_CFG0_CAL_END_WAKE_UP_EN 6
+#define CC1200_RFEND_CFG0_TXOFF_MODE 4
+#define CC1200_RFEND_CFG0_TXOFF_MODE_IDLE 0
+#define CC1200_RFEND_CFG0_TXOFF_MODE_FSTXON 1
+#define CC1200_RFEND_CFG0_TXOFF_MODE_TX 2
+#define CC1200_RFEND_CFG0_TXOFF_MODE_RX 3
+#define CC1200_RFEND_CFG0_TERM_ON_BAD_PACKET_EN 3
+#define CC1200_RFEND_CFG0_ANT_DIV_RX_TERM_CFG 0
#define CC1200_PA_CFG1 0x2b
#define CC1200_PA_CFG0 0x2c
#define CC1200_ASK_CFG 0x2d
#define CC1200_PKT_LEN 0x2e
-#define CC1200_EXTENDED 0x2f
+#define CC1200_EXTENDED 0x2f
/* Command strobes */
#define CC1200_SRES 0x30
@@ -424,10 +442,25 @@
#define CC1200_ECG_CFG (CC1200_EXTENDED_BIT | 0x04)
#define CC1200_MDMCFG2 (CC1200_EXTENDED_BIT | 0x05)
-# define CC1200_MDMCFG2_ASK_SHAPE 6
-# define CC1200_MDMCFG2_SYMBOL_MAP_CFG 4
-# define CC1200_MDMCFG2_UPSAMPLER_P 1
-# define CC1200_MDMCFG2_CFM_DATA_EN 0
+#define CC1200_MDMCFG2_ASK_SHAPE 6
+#define CC1200_MDMCFG2_ASK_SHAPE_8 0
+#define CC1200_MDMCFG2_ASK_SHAPE_16 1
+#define CC1200_MDMCFG2_ASK_SHAPE_32 2
+#define CC1200_MDMCFG2_ASK_SHAPE_128 3
+#define CC1200_MDMCFG2_SYMBOL_MAP_CFG 4
+#define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 0
+#define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_1 1
+#define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_2 2
+#define CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_3 3
+#define CC1200_MDMCFG2_UPSAMPLER_P 1
+#define CC1200_MDMCFG2_UPSAMPLER_P_1 0
+#define CC1200_MDMCFG2_UPSAMPLER_P_2 1
+#define CC1200_MDMCFG2_UPSAMPLER_P_4 2
+#define CC1200_MDMCFG2_UPSAMPLER_P_8 3
+#define CC1200_MDMCFG2_UPSAMPLER_P_16 4
+#define CC1200_MDMCFG2_UPSAMPLER_P_32 5
+#define CC1200_MDMCFG2_UPSAMPLER_P_64 6
+#define CC1200_MDMCFG2_CFM_DATA_EN 0
#define CC1200_EXT_CTRL (CC1200_EXTENDED_BIT | 0x06)
#define CC1200_RCCAL_FINE (CC1200_EXTENDED_BIT | 0x07)
@@ -527,23 +560,39 @@
#define CC1200_PARTNUMBER (CC1200_EXTENDED_BIT | 0x8f)
#define CC1200_PARTVERSION (CC1200_EXTENDED_BIT | 0x90)
#define CC1200_SERIAL_STATUS (CC1200_EXTENDED_BIT | 0x91)
-#define CC1200_RX_STATUS (CC1200_EXTENDED_BIT | 0x92)
-#define CC1200_TX_STATUS (CC1200_EXTENDED_BIT | 0x93)
+#define CC1200_MODEM_STATUS1 (CC1200_EXTENDED_BIT | 0x92)
+#define CC1200_MODEM_STATUS1_SYNC_FOUND 7
+#define CC1200_MODEM_STATUS1_RXFIFO_FULL 6
+#define CC1200_MODEM_STATUS1_RXFIFO_THR 5
+#define CC1200_MODEM_STATUS1_RXFIFO_EMPTY 4
+#define CC1200_MODEM_STATUS1_RXFIFO_OVERFLOW 3
+#define CC1200_MODEM_STATUS1_RXFIFO_UNDERFLOW 2
+#define CC1200_MODEM_STATUS1_PQT_REACHED 1
+#define CC1200_MODEM_STATUS1_PQT_VALID 0
+
+#define CC1200_MODEM_STATUS0 (CC1200_EXTENDED_BIT | 0x93)
+#define CC1200_MODEM_STATUS0_FEC_RX_OVERFLOW 6
+#define CC1200_MODEM_STATUS0_SYNC_SENT 4
+#define CC1200_MODEM_STATUS0_TXFIFO_FULL 3
+#define CC1200_MODEM_STATUS0_TXFIFO_THR 2
+#define CC1200_MODEM_STATUS0_TXFIFO_OVERFLOW 1
+#define CC1200_MODEM_STATUS0_TXFIFO_UNDERFLOW 0
+
#define CC1200_MARC_STATUS1 (CC1200_EXTENDED_BIT | 0x94)
-# define CC1200_MARC_STATUS1_NO_FAILURE 0
-# define CC1200_MARC_STATUS1_RX_TIMEOUT 1
-# define CC1200_MARC_STATUS1_RX_TERMINATION 2
-# define CC1200_MARC_STATUS1_EWOR_SYNC_LOST 3
-# define CC1200_MARC_STATUS1_MAXIMUM_LENGTH 4
-# define CC1200_MARC_STATUS1_ADDRESS 5
-# define CC1200_MARC_STATUS1_CRC 6
-# define CC1200_MARC_STATUS1_TX_FIFO_OVERFLOW 7
-# define CC1200_MARC_STATUS1_TX_FIFO_UNDERFLOW 8
-# define CC1200_MARC_STATUS1_RX_FIFO_OVERFLOW 9
-# define CC1200_MARC_STATUS1_RX_FIFO_UNDERFLOW 10
-# define CC1200_MARC_STATUS1_TX_ON_CCA_FAILED 11
-# define CC1200_MARC_STATUS1_TX_FINISHED 0x40
-# define CC1200_MARC_STATUS1_RX_FINISHED 0x80
+#define CC1200_MARC_STATUS1_NO_FAILURE 0
+#define CC1200_MARC_STATUS1_RX_TIMEOUT 1
+#define CC1200_MARC_STATUS1_RX_TERMINATION 2
+#define CC1200_MARC_STATUS1_EWOR_SYNC_LOST 3
+#define CC1200_MARC_STATUS1_MAXIMUM_LENGTH 4
+#define CC1200_MARC_STATUS1_ADDRESS 5
+#define CC1200_MARC_STATUS1_CRC 6
+#define CC1200_MARC_STATUS1_TX_FIFO_OVERFLOW 7
+#define CC1200_MARC_STATUS1_TX_FIFO_UNDERFLOW 8
+#define CC1200_MARC_STATUS1_RX_FIFO_OVERFLOW 9
+#define CC1200_MARC_STATUS1_RX_FIFO_UNDERFLOW 10
+#define CC1200_MARC_STATUS1_TX_ON_CCA_FAILED 11
+#define CC1200_MARC_STATUS1_TX_FINISHED 0x40
+#define CC1200_MARC_STATUS1_RX_FINISHED 0x80
#define CC1200_MARC_STATUS0 (CC1200_EXTENDED_BIT | 0x95)
#define CC1200_PA_IFAMP_TEST (CC1200_EXTENDED_BIT | 0x96)
#define CC1200_FSRF_TEST (CC1200_EXTENDED_BIT | 0x97)
diff --git a/src/drivers/ao_cc1200_CC1200.h b/src/drivers/ao_cc1200_CC1200.h
index 670e89ef..c5497196 100644
--- a/src/drivers/ao_cc1200_CC1200.h
+++ b/src/drivers/ao_cc1200_CC1200.h
@@ -7,34 +7,100 @@
*
***************************************************************/
+/*
+ * Values affecting receive sensitivity:
+ *
+ *
+ * PQT - sets how good the preamble needs to look before
+ * we start looking for a sync word
+ * SYNC_THR - sets how good the sync needs to be before we
+ * start decoding a packet
+ */
+
+/* Values depending on data rate
+ *
+ * DCFILT_BW_SETTLE
+ * DCFILT_BW
+ */
+
+#ifndef AO_CC1200_AGC_GAIN_ADJUST
+#define AO_CC1200_AGC_GAIN_ADJUST -81
+#endif
CC1200_IOCFG2, 0x06, /* GPIO2 IO Pin Configuration */
- CC1200_SYNC1, 0x6e, /* Sync Word Configuration [15:8] */
- CC1200_SYNC0, 0x4e, /* Sync Word Configuration [7:0] */
- CC1200_SYNC_CFG1, 0xea, /* Sync Word Detection Configuration Reg. 1 */
+ CC1200_SYNC3, 0xD3, /* Sync Word Configuration [23:16] */
+ CC1200_SYNC2, 0x91, /* Sync Word Configuration [23:16] */
+ CC1200_SYNC1, 0xD3, /* Sync Word Configuration [15:8] */
+ CC1200_SYNC0, 0x91, /* Sync Word Configuration [7:0] */
+ CC1200_SYNC_CFG1, /* Sync Word Detection Configuration Reg. 1 */
+ ((CC1200_SYNC_CFG1_SYNC_MODE_16_BITS << CC1200_SYNC_CFG1_SYNC_MODE) |
+ (11 << CC1200_SYNC_CFG1_SYNC_THR)),
+ CC1200_SYNC_CFG0, /* Sync Word Detection Configuration Reg. 0 */
+ ((1 << CC1200_SYNC_CFG0_AUTO_CLEAR) |
+ (0 << CC1200_SYNC_CFG0_RX_CONFIG_LIMITATION) |
+ (1 << CC1200_SYNC_CFG0_PQT_GATING_EN) |
+ (0 << CC1200_SYNC_CFG0_EXT_SYNC_DETECT) |
+ (CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK_DISABLED << CC1200_SYNC_CFG0_SYNC_STRICT_SYNC_CHECK)),
CC1200_DEVIATION_M, 0x50, /* Frequency Deviation Configuration */
CC1200_DCFILT_CFG, 0x5d, /* Digital DC Removal Configuration */
- CC1200_PREAMBLE_CFG0, 0x8a, /* Preamble Detection Configuration Reg. 0 */
+ CC1200_PREAMBLE_CFG0, /* Preamble Detection Configuration Reg. 0 */
+ ((1 << CC1200_PREAMBLE_CFG0_PQT_EN) |
+ (CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_11 << CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT) |
+ (15 << CC1200_PREAMBLE_CFG0_PQT)),
CC1200_IQIC, 0xcb, /* Digital Image Channel Compensation Configuration */
CC1200_CHAN_BW, 0x11, /* Channel Filter Configuration */
CC1200_MDMCFG1, 0x40, /* General Modem Parameter Configuration Reg. 1 */
CC1200_MDMCFG0, 0x05, /* General Modem Parameter Configuration Reg. 0 */
CC1200_SYMBOL_RATE2, 0x93, /* Symbol Rate Configuration Exponent and Mantissa [1.. */
- CC1200_AGC_REF, 0x37, /* AGC Reference Level Configuration */
+ CC1200_AGC_REF, 0x27, /* AGC Reference Level Configuration */
CC1200_AGC_CS_THR, 0xec, /* Carrier Sense Threshold Configuration */
+ CC1200_AGC_GAIN_ADJUST, /* RSSI adjustment */
+ AO_CC1200_AGC_GAIN_ADJUST,
CC1200_AGC_CFG1, 0x51, /* Automatic Gain Control Configuration Reg. 1 */
CC1200_AGC_CFG0, 0x87, /* Automatic Gain Control Configuration Reg. 0 */
- CC1200_FIFO_CFG, 0x00, /* FIFO Configuration */
- CC1200_FS_CFG, 0x14, /* Frequency Synthesizer Configuration */
- CC1200_PKT_CFG2, 0x20, /* Packet Configuration Reg. 2 */
- CC1200_PKT_CFG1, 0xc3, /* Packet Configuration Reg. 1 */
- CC1200_PKT_CFG0, 0x20, /* Packet Configuration Reg. 0 */
+ CC1200_FIFO_CFG, 0x40, /* FIFO Configuration */
+ CC1200_SETTLING_CFG, /* Frequency Synthesizer Calibration and Settling Configuration */
+ ((CC1200_SETTLING_CFG_FS_AUTOCAL_EVERY_4TH_TIME << CC1200_SETTLING_CFG_FS_AUTOCAL) |
+ (CC1200_SETTLING_CFG_LOCK_TIME_75_30 << CC1200_SETTLING_CFG_LOCK_TIME) |
+ (CC1200_SETTLING_CFG_FSREG_TIME_60 << CC1200_SETTLING_CFG_FSREG_TIME)),
+ CC1200_FS_CFG, /* Frequency Synthesizer Configuration */
+ ((1 << CC1200_FS_CFG_LOCK_EN) |
+ (CC1200_FS_CFG_FSD_BANDSELECT_410_480 << CC1200_FS_CFG_FSD_BANDSELECT)),
+ CC1200_PKT_CFG2, /* Packet Configuration Reg. 2 */
+ ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
+ (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
+ (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
+ CC1200_PKT_CFG1, /* Packet Configuration Reg. 1 */
+ ((1 << CC1200_PKT_CFG1_FEC_EN) |
+ (1 << CC1200_PKT_CFG1_WHITE_DATA) |
+ (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
+ (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES << CC1200_PKT_CFG1_CRC_CFG) |
+ (1 << CC1200_PKT_CFG1_APPEND_STATUS)),
+ CC1200_PKT_CFG0, /* Packet Configuration Reg. 0 */
+ ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
+ (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
+ (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
+ (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
+ CC1200_RFEND_CFG1, /* RFEND Configuration Reg. 1 */
+ ((CC1200_RFEND_CFG1_RXOFF_MODE_IDLE << CC1200_RFEND_CFG1_RXOFF_MODE) |
+ (CC1200_RFEND_CFG1_RX_TIME_INFINITE << CC1200_RFEND_CFG1_RX_TIME) |
+ (0 << CC1200_RFEND_CFG1_RX_TIME_QUAL)),
+ CC1200_RFEND_CFG0, /* RFEND Configuration Reg. 0 */
+ ((0 << CC1200_RFEND_CFG0_CAL_END_WAKE_UP_EN) |
+ (CC1200_RFEND_CFG0_TXOFF_MODE_IDLE << CC1200_RFEND_CFG0_TXOFF_MODE) |
+ (1 << CC1200_RFEND_CFG0_TERM_ON_BAD_PACKET_EN) |
+ (0 << CC1200_RFEND_CFG0_ANT_DIV_RX_TERM_CFG)),
CC1200_PA_CFG1, 0x3f, /* Power Amplifier Configuration Reg. 1 */
CC1200_PA_CFG0, 0x53, /* Power Amplifier Configuration Reg. 0 */
CC1200_PKT_LEN, 0xff, /* Packet Length Configuration */
CC1200_IF_MIX_CFG, 0x1c, /* IF Mix Configuration */
CC1200_FREQOFF_CFG, 0x22, /* Frequency Offset Correction Configuration */
- CC1200_MDMCFG2, 0x0c, /* General Modem Parameter Configuration Reg. 2 */
+ CC1200_MDMCFG2, /* General Modem Parameter Configuration Reg. 2 */
+ ((CC1200_MDMCFG2_ASK_SHAPE_8 << CC1200_MDMCFG2_ASK_SHAPE) |
+ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
+ (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
+ (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
CC1200_FREQ2, 0x6c, /* Frequency Configuration [23:16] */
CC1200_FREQ1, 0xa3, /* Frequency Configuration [15:8] */
CC1200_FREQ0, 0x33, /* Frequency Configuration [7:0] */
generated by cgit v1.2.3 (git 2.39.1) at 2025-10-17 22:26:00 +0000