diff options
| -rw-r--r-- | src/stmf0/ao_arch_funcs.h | 3 | ||||
| -rw-r--r-- | src/stmf0/ao_timer.c | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/stmf0/ao_arch_funcs.h b/src/stmf0/ao_arch_funcs.h index a0c6e088..591ca8a0 100644 --- a/src/stmf0/ao_arch_funcs.h +++ b/src/stmf0/ao_arch_funcs.h @@ -458,6 +458,9 @@ static inline void ao_sleep_mode(void) { ao_arch_block_interrupts(); + /* Enable power interface clock */ + stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN); + ao_arch_nop(); stm_scb.scr |= (1 << STM_SCB_SCR_SLEEPDEEP); ao_arch_nop(); stm_pwr.cr |= (1 << STM_PWR_CR_PDDS) | (1 << STM_PWR_CR_LPDS); diff --git a/src/stmf0/ao_timer.c b/src/stmf0/ao_timer.c index 58e52995..be333754 100644 --- a/src/stmf0/ao_timer.c +++ b/src/stmf0/ao_timer.c @@ -294,9 +294,6 @@ ao_clock_init(void) /* Enable 1 wait state so the CPU can run at 48MHz */ stm_flash.acr |= (STM_FLASH_ACR_LATENCY_1 << STM_FLASH_ACR_LATENCY); - /* Enable power interface clock */ - stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN); - /* HCLK to 48MHz -> AHB prescaler = /1 */ cfgr = stm_rcc.cfgr; cfgr &= ~(STM_RCC_CFGR_HPRE_MASK << STM_RCC_CFGR_HPRE); |