diff options
author | Keith Packard <keithp@keithp.com> | 2016-03-24 19:25:33 -0600 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2016-03-26 16:07:20 -0700 |
commit | 7348cc4736c9a94f9ad299edd78199b544d0e95a (patch) | |
tree | a4d1237a22b8ebc835cc1973054856d63b00b10c /src | |
parent | b31c6fd153825ae5ad0fcea7189472af1a9cffff (diff) |
altos: Add one-byte SPI output routine for LPC and STM cores
This allows for SPI output at interrupt time, one byte at a time.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/lpc/ao_arch_funcs.h | 22 | ||||
-rw-r--r-- | src/stm/ao_arch_funcs.h | 28 |
2 files changed, 50 insertions, 0 deletions
diff --git a/src/lpc/ao_arch_funcs.h b/src/lpc/ao_arch_funcs.h index fbe641d8..dbb41538 100644 --- a/src/lpc/ao_arch_funcs.h +++ b/src/lpc/ao_arch_funcs.h @@ -227,6 +227,28 @@ ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index); void ao_spi_init(void); +static inline void +ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index) +{ + ao_spi_send(block, len, spi_index); +} + +static inline void ao_spi_send_byte(uint8_t byte, uint8_t spi_index) +{ + struct lpc_ssp *lpc_ssp; + switch (spi_index) { + case 0: + lpc_ssp = &lpc_ssp0; + break; + case 1: + lpc_ssp = &lpc_ssp1; + break; + } + lpc_ssp->dr = byte; + while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0); + (void) lpc_ssp->dr; +} + #define ao_spi_init_cs(port, mask) do { \ uint8_t __bit__; \ for (__bit__ = 0; __bit__ < 32; __bit__++) { \ diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h index 6b38032c..087e00d9 100644 --- a/src/stm/ao_arch_funcs.h +++ b/src/stm/ao_arch_funcs.h @@ -82,6 +82,34 @@ ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index); void ao_spi_send_sync(void *block, uint16_t len, uint8_t spi_index); +static inline void +ao_spi_send_byte(uint8_t byte, uint8_t spi_index) +{ + struct stm_spi *stm_spi; + + switch (AO_SPI_INDEX(spi_index)) { + case 0: + stm_spi = &stm_spi1; + break; + case 1: + stm_spi = &stm_spi2; + break; + } + + stm_spi->cr2 = ((0 << STM_SPI_CR2_TXEIE) | + (0 << STM_SPI_CR2_RXNEIE) | + (0 << STM_SPI_CR2_ERRIE) | + (0 << STM_SPI_CR2_SSOE) | + (0 << STM_SPI_CR2_TXDMAEN) | + (0 << STM_SPI_CR2_RXDMAEN)); + + /* Clear RXNE */ + (void) stm_spi->dr; + + while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE))); + stm_spi->dr = byte; +} + void ao_spi_recv(void *block, uint16_t len, uint8_t spi_index); |