diff options
| author | Keith Packard <keithp@keithp.com> | 2015-01-25 19:35:19 -0800 | 
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2015-01-25 19:35:19 -0800 | 
| commit | df881bce8576f091b2d8cb53b8ce8a43aeedecde (patch) | |
| tree | 5ee730fc6822f0c5755525212139a709c3a98341 /src/stmf0/ao_arch_funcs.h | |
| parent | 02e1058fa52ee7c867ea6c9031ebb9e21d14889c (diff) | |
altos: Add self-flash support for STM32F042 processor
Also moves the usual address for applications out of the way of the
flash loader.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stmf0/ao_arch_funcs.h')
| -rw-r--r-- | src/stmf0/ao_arch_funcs.h | 33 | 
1 files changed, 11 insertions, 22 deletions
diff --git a/src/stmf0/ao_arch_funcs.h b/src/stmf0/ao_arch_funcs.h index 2f2f8f43..a5c6764b 100644 --- a/src/stmf0/ao_arch_funcs.h +++ b/src/stmf0/ao_arch_funcs.h @@ -120,31 +120,26 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s  #define ao_enable_port(port) do {					\  		if ((port) == &stm_gpioa)				\ -			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN); \ +			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN); \  		else if ((port) == &stm_gpiob)				\ -			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN); \ +			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPBEN); \  		else if ((port) == &stm_gpioc)				\ -			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN); \ -		else if ((port) == &stm_gpiod)				\ -			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN); \ -		else if ((port) == &stm_gpioe)				\ -			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \ +			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPCEN); \ +		else if ((port) == &stm_gpiof)				\ +			stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPFEN); \  	} while (0)  #define ao_disable_port(port) do {					\  		if ((port) == &stm_gpioa)				\ -			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOAEN); \ +			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_IOPAEN); \  		else if ((port) == &stm_gpiob)				\ -			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOBEN); \ +			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_IOPBEN); \  		else if ((port) == &stm_gpioc)				\ -			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOCEN); \ -		else if ((port) == &stm_gpiod)				\ -			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIODEN); \ -		else if ((port) == &stm_gpioe)				\ -			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOEEN); \ +			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_IOPCEN); \ +		else if ((port) == &stm_gpiof)				\ +			stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_IOPFEN); \  	} while (0) -  #define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)  #define ao_gpio_get(port, bit, pin) stm_gpio_get(port, bit) @@ -163,7 +158,7 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s  		else							\  			stm_pupdr_set(port, bit, STM_PUPDR_NONE);	\  	} while (0) -	 +  #define ao_enable_input(port,bit,mode) do {				\  		ao_enable_port(port);					\  		stm_moder_set(port, bit, STM_MODER_INPUT);		\ @@ -389,10 +384,4 @@ static inline void ao_arch_start_scheduler(void) {  		ao_arch_irqrestore(__mask);		\  	} while (0) -void -ao_clock_enable_crs(void); - -void -ao_clock_disable_crs(void); -  #endif /* _AO_ARCH_FUNCS_H_ */  | 
