Basic OS running on STM32L

This gets stm-demo working

Signed-off-by: Keith Packard <keithp@keithp.com>

4 files changed, 70 insertions, 38 deletions

diff --git a/src/stm/ao_arch.h b/src/stm/ao_arch.h
index b3c0190d..205f95d7 100644
--- a/src/stm/ao_arch.h
+++ b/src/stm/ao_arch.h
@@ -25,7 +25,7 @@
  * STM32L definitions and code fragments for AltOS
  */
 
-#define AO_STACK_SIZE	256
+#define AO_STACK_SIZE	1024
 
 /* Various definitions to make GCC look more like SDCC */
 
@@ -67,29 +67,26 @@ extern const uint16_t ao_serial_number;
 
 #define ao_arch_init_stack(task, start) do {				\
 		uint32_t	*sp = (uint32_t *) (task->stack + AO_STACK_SIZE); \
-		uint16_t	a = (uint16_t) start; 			\
+		uint32_t	a = (uint32_t) start; 			\
 		int		i;					\
 									\
-		/* Return address */					\
+		/* Return address (goes into LR) */			\
 		ARM_PUSH32(sp, a);					\
 									\
-		/* Invalid link register */				\
-		ARM_PUSH32(sp, 0xffffffff);				\
-									\
 		/* Clear register values  */				\
 		i = 13;							\
 		while (i--)						\
 			ARM_PUSH32(sp, 0);				\
 									\
-		/* PSR with interrupts enabled */			\
-		ARM_PUSH32(sp, 0x01000000);				\
+		/* APSR */						\
+		ARM_PUSH32(sp, 0);					\
 		task->sp = sp;						\
 } while (0);
 	
 #define ao_arch_save_regs() do {					\
 		asm("push {r0-r12,lr}\n");				\
 		cli();							\
-		asm("mrs r0,psr" "\n\t" "push {r0}");			\
+		asm("mrs r0,apsr" "\n\t" "push {r0}");			\
 		sei();							\
 	} while (0)
 
@@ -97,6 +94,8 @@ extern const uint16_t ao_serial_number;
 		uint32_t	sp;					\
 		asm("mov %0,sp" : "=&r" (sp) );				\
 		ao_cur_task->sp = (uint32_t *) (sp);			\
+		if ((uint8_t *) ao_cur_task->sp < ao_cur_task->stack)	\
+			ao_panic (AO_PANIC_STACK);			\
 	} while (0)
 
 #define ao_arch_isr_stack()	/* nothing */
@@ -110,7 +109,7 @@ extern const uint16_t ao_serial_number;
 		sp = (uint32_t) ao_cur_task->sp;			\
 		cli();							\
 		asm("mov sp, %0" : : "r" (sp) );			\
-		asm("pop {r0}" "\n\t" "msr psr,r0");			\
+		asm("pop {r0}" "\n\t" "msr apsr,r0");			\
 		asm("pop {r0-r12,lr}\n");				\
 		asm("bx lr");						\
 	} while(0)
diff --git a/src/stm/ao_serial_stm.c b/src/stm/ao_serial_stm.c
index ead2570f..38f16e5e 100644
--- a/src/stm/ao_serial_stm.c
+++ b/src/stm/ao_serial_stm.c
@@ -51,19 +51,20 @@ ao_serial_tx1_start(void)
 void stm_usart1_isr(void)
 {
 	uint32_t	sr;
-	cli();
+
 	sr = stm_usart1.sr;
 	stm_usart1.sr = 0;
-	sei();
+
 	if (sr & (1 << STM_USART_SR_RXNE)) {
+		char c = stm_usart1.dr;
 		if (!ao_fifo_full(ao_usart1_rx_fifo))
-			ao_fifo_insert(ao_usart1_rx_fifo, stm_usart1.dr);
+			ao_fifo_insert(ao_usart1_rx_fifo, c);
 		ao_wakeup(&ao_usart1_rx_fifo);
 #if USE_SERIAL_STDIN
 		ao_wakeup(&ao_stdin_ready);
 #endif
 	}
-	if (sr & (1 << STM_USART_SR_TXE)) {
+	if (sr & (1 << STM_USART_SR_TC)) {
 		ao_serial_tx1_started = 0;
 		ao_serial_tx1_start();
 		ao_wakeup(&ao_usart1_tx_fifo);
@@ -174,8 +175,8 @@ ao_serial_init(void)
 			  (0 << STM_USART_CR1_PCE) |
 			  (0 << STM_USART_CR1_PS) |
 			  (0 << STM_USART_CR1_PEIE) |
-			  (1 << STM_USART_CR1_TXEIE) |
-			  (0 << STM_USART_CR1_TCIE) |
+			  (0 << STM_USART_CR1_TXEIE) |
+			  (1 << STM_USART_CR1_TCIE) |
 			  (1 << STM_USART_CR1_RXNEIE) |
 			  (0 << STM_USART_CR1_IDLEIE) |
 			  (1 << STM_USART_CR1_TE) |
@@ -210,13 +211,11 @@ ao_serial_init(void)
 	ao_serial_set_speed(AO_SERIAL_SPEED_9600);
 
 	printf ("serial initialized\n");
-#if 0
 #if USE_SERIAL_STDIN
 	ao_add_stdio(ao_serial_pollchar,
 		     ao_serial_putchar,
 		     NULL);
 #endif
-#endif
 
 	stm_nvic_set_enable(STM_ISR_USART1_POS);
 	stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
diff --git a/src/stm/ao_timer.c b/src/stm/ao_timer.c
index 76304f0e..387df184 100644
--- a/src/stm/ao_timer.c
+++ b/src/stm/ao_timer.c
@@ -48,13 +48,16 @@ ao_debug_out(char c);
 
 void stm_tim6_isr(void)
 {
-	++ao_tick_count;
+	if (stm_tim6.sr & (1 << STM_TIM67_SR_UIF)) {
+		stm_tim6.sr = 0;
+		++ao_tick_count;
 #if HAS_ADC
-	if (++ao_adc_count == ao_adc_interval) {
-		ao_adc_count = 0;
-		ao_adc_poll();
-	}
+		if (++ao_adc_count == ao_adc_interval) {
+			ao_adc_count = 0;
+			ao_adc_poll();
+		}
 #endif
+	}
 }
 
 #if HAS_ADC
diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 5b3f6b2f..d7c382a6 100644
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -655,21 +655,52 @@ isr(usb_fs_wkup)
 isr(tim6)
 isr(tim7)
 
-#define STM_ISR_TIM9_POS	25
-#define STM_ISR_TIM10_POS	26
-#define STM_ISR_TIM11_POS	27
-#define STM_ISR_TIM2_POS	28
-#define STM_ISR_TIM3_POS	29
-#define STM_ISR_TIM4_POS	30
-
-#define STM_ISR_SPI1_POS	35
-#define STM_ISR_SPI2_POS	36
-#define STM_ISR_USART1_POS	37
-#define STM_ISR_USART2_POS	38
-#define STM_ISR_USART3_POS	39
-#define STM_ISR_TIM6_POS	43
-#define STM_ISR_TIM7_POS	44
-
 #undef isr
 
+#define STM_ISR_WWDG_POS		0
+#define STM_ISR_PVD_POS			1
+#define STM_ISR_TAMPER_STAMP_POS	2
+#define STM_ISR_RTC_WKUP_POS		3
+#define STM_ISR_FLASH_POS		4
+#define STM_ISR_RCC_POS			5
+#define STM_ISR_EXTI0_POS		6
+#define STM_ISR_EXTI1_POS		7
+#define STM_ISR_EXTI2_POS		8
+#define STM_ISR_EXTI3_POS		9
+#define STM_ISR_EXTI4_POS		10
+#define STM_ISR_DMA1_CHANNEL1_POS	11
+#define STM_ISR_DMA2_CHANNEL1_POS	12
+#define STM_ISR_DMA3_CHANNEL1_POS	13
+#define STM_ISR_DMA4_CHANNEL1_POS	14
+#define STM_ISR_DMA5_CHANNEL1_POS	15
+#define STM_ISR_DMA6_CHANNEL1_POS	16
+#define STM_ISR_DMA7_CHANNEL1_POS	17
+#define STM_ISR_ADC1_POS		18
+#define STM_ISR_USB_HP_POS		19
+#define STM_ISR_USB_LP_POS		20
+#define STM_ISR_DAC_POS			21
+#define STM_ISR_COMP_POS		22
+#define STM_ISR_EXTI9_5_POS		23
+#define STM_ISR_LCD_POS			24
+#define STM_ISR_TIM9_POS		25
+#define STM_ISR_TIM10_POS		26
+#define STM_ISR_TIM11_POS		27
+#define STM_ISR_TIM2_POS		28
+#define STM_ISR_TIM3_POS		29
+#define STM_ISR_TIM4_POS		30
+#define STM_ISR_I2C1_EV_POS		31
+#define STM_ISR_I2C1_ER_POS		32
+#define STM_ISR_I2C2_EV_POS		33
+#define STM_ISR_I2C2_ER_POS		34
+#define STM_ISR_SPI1_POS		35
+#define STM_ISR_SPI2_POS		36
+#define STM_ISR_USART1_POS		37
+#define STM_ISR_USART2_POS		38
+#define STM_ISR_USART3_POS		39
+#define STM_ISR_EXTI15_10_POS		40
+#define STM_ISR_RTC_ALARM_POS		41
+#define STM_ISR_USB_FS_WKUP_POS		42
+#define STM_ISR_TIM6_POS		43
+#define STM_ISR_TIM7_POS		44
+
 #endif /* _STM32L_H_ */