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authorKeith Packard <keithp@keithp.com>2013-02-24 00:18:14 -0800
committerKeith Packard <keithp@keithp.com>2013-05-07 20:12:40 -0700
commita6887032b4d217bca5236ea15389218f10d69545 (patch)
tree8e6673e7046bc90773ffd4f52b448fdf5109ba8c /src/stm
parent887209b61ac3012d0fd2206cf1016c44f59cb432 (diff)
Add STM self-flashing loader
This allows the real application to get loaded at 0x2000 and jumps to that at startup time if the boot pin is set appropriately Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm')
-rw-r--r--src/stm/ao_arch_funcs.h23
-rw-r--r--src/stm/ao_interrupt.c40
2 files changed, 60 insertions, 3 deletions
diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index f3d68202..2c0f173c 100644
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -113,6 +113,19 @@ ao_spi_init(void);
stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
} while (0)
+#define ao_disable_port(port) do { \
+ if ((port) == &stm_gpioa) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOAEN); \
+ else if ((port) == &stm_gpiob) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOBEN); \
+ else if ((port) == &stm_gpioc) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOCEN); \
+ else if ((port) == &stm_gpiod) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIODEN); \
+ else if ((port) == &stm_gpioe) \
+ stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOEEN); \
+ } while (0)
+
#define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
@@ -124,9 +137,7 @@ ao_spi_init(void);
stm_moder_set(port, bit, STM_MODER_OUTPUT);\
} while (0)
-#define ao_enable_input(port,bit,mode) do { \
- ao_enable_port(port); \
- stm_moder_set(port, bit, STM_MODER_INPUT); \
+#define ao_gpio_set_mode(port,bit,mode) do { \
if (mode == AO_EXTI_MODE_PULL_UP) \
stm_pupdr_set(port, bit, STM_PUPDR_PULL_UP); \
else if (mode == AO_EXTI_MODE_PULL_DOWN) \
@@ -134,6 +145,12 @@ ao_spi_init(void);
else \
stm_pupdr_set(port, bit, STM_PUPDR_NONE); \
} while (0)
+
+#define ao_enable_input(port,bit,mode) do { \
+ ao_enable_port(port); \
+ stm_moder_set(port, bit, STM_MODER_INPUT); \
+ ao_gpio_set_mode(port, bit, mode); \
+ } while (0)
#define ao_enable_cs(port,bit) do { \
stm_gpio_set((port), bit, 1); \
diff --git a/src/stm/ao_interrupt.c b/src/stm/ao_interrupt.c
index a423d8b1..12763a30 100644
--- a/src/stm/ao_interrupt.c
+++ b/src/stm/ao_interrupt.c
@@ -36,7 +36,47 @@ void stm_ignore_isr(void)
{
}
+const void *stm_interrupt_vector[];
+
+#define BOOT_FETCH(o) (*((uint32_t *) (AO_BOOT_APPLICATION_BASE + (o))))
+
+#ifdef AO_BOOT_APPLICATION_PIN
+#include <ao_exti.h>
+#endif
+
void start(void) {
+#ifdef AO_BOOT_APPLICATION_PIN
+ uint16_t v;
+
+ /* Enable power interface clock */
+ stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN);
+
+ /* Enable the input pin */
+ ao_enable_input(&AO_BOOT_APPLICATION_GPIO, AO_BOOT_APPLICATION_PIN,
+ AO_BOOT_APPLICATION_MODE);
+
+ /* Read the value */
+ v = stm_gpio_get(&AO_BOOT_APPLICATION_GPIO, AO_BOOT_APPLICATION_PIN);
+
+ /* Reset the chip to turn off the port and the power interface clock */
+ ao_gpio_set_mode(&AO_BOOT_APPLICATION_GPIO, AO_BOOT_APPLICATION_PIN, 0);
+ ao_disable_port(&AO_BOOT_APPLICATION_GPIO);
+ stm_rcc.apb1enr &= ~(1 << STM_RCC_APB1ENR_PWREN);
+ if (v == AO_BOOT_APPLICATION_VALUE)
+ {
+ uint32_t sp;
+ uint32_t pc;
+
+ sp = BOOT_FETCH(0);
+ pc = BOOT_FETCH(4);
+ asm ("mov sp, %0" : : "r" (sp));
+ asm ("mov lr, %0" : : "r" (pc));
+ asm ("bx lr");
+ }
+#endif
+
+ /* Set interrupt vector table offset */
+ stm_nvic.vto = (uint32_t) &stm_interrupt_vector;
memcpy(&__data_start__, &__text_end__, &__data_end__ - &__data_start__);
memset(&__bss_start__, '\0', &__bss_end__ - &__bss_start__);
main();