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authorKeith Packard <keithp@keithp.com>2019-03-18 17:20:14 -0700
committerKeith Packard <keithp@keithp.com>2019-03-18 17:22:22 -0700
commite38e1a2f735a1bb4aebf0817cdd99a05567c6340 (patch)
treeab2cbe696e8e023ae637a3601f9332ad3bcc46b5 /src/stm32f4/stm32f4.h
parent65be5d1e07ff4ae619233f3b541b9599c44490ab (diff)
altos/stm32f4: Wrong value for CK48MSEL_PLL_Q
This meant that the USB clock wasn't actually getting started... Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm32f4/stm32f4.h')
-rw-r--r--src/stm32f4/stm32f4.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/stm32f4/stm32f4.h b/src/stm32f4/stm32f4.h
index 3e8ec957..94ee23bf 100644
--- a/src/stm32f4/stm32f4.h
+++ b/src/stm32f4/stm32f4.h
@@ -269,7 +269,7 @@ extern struct stm_rcc stm_rcc;
#define STM_RCC_DCKCFGR2_SDIOSEL_CK_48MHZ 0
#define STM_RCC_DCKCFGR2_SDIOSEL_SYSTEM_CLOCK 1
#define STM_RCC_DCKCFGR2_CK48MSEL 27
-#define STM_RCC_DCKCFGR2_CK48MSEL_PLL_Q 1
+#define STM_RCC_DCKCFGR2_CK48MSEL_PLL_Q 0
#define STM_RCC_DCKCFGR2_CK48MSEL_PLLI2S_Q 1
#define STM_RCC_DCKCFGR2_I2CFMP1SEL 22
#define STM_RCC_DCKCFGR2_I2CFMP1SEL_APB 0