diff options
| author | Keith Packard <keithp@keithp.com> | 2019-03-18 17:17:21 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2019-03-18 17:22:22 -0700 |
| commit | 65be5d1e07ff4ae619233f3b541b9599c44490ab (patch) | |
| tree | 52e3aa8360dce2dddc12b2d9ab9e138c38fe0129 /src/stm32f4/ao_timer.c | |
| parent | efc2c093819b3ec2e5743126efb76d3a9c0ad231 (diff) | |
altos/stm32f4: Need to read-back register after clock enable
This was reported as necessary; I have no idea, but it's not
expensive, so why not...
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm32f4/ao_timer.c')
| -rw-r--r-- | src/stm32f4/ao_timer.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/stm32f4/ao_timer.c b/src/stm32f4/ao_timer.c index d6ef9bc3..fb83db00 100644 --- a/src/stm32f4/ao_timer.c +++ b/src/stm32f4/ao_timer.c @@ -262,13 +262,12 @@ ao_clock_init(void) #if DEBUG_THE_CLOCK /* Output PLL clock on PA8 and SYCLK on PC9 for measurments */ - stm_rcc.ahb1enr |= ((1 << STM_RCC_AHB1ENR_IOPAEN) | - (1 << STM_RCC_AHB1ENR_IOPCEN)); - + ao_enable_port(&stm_gpioa); stm_afr_set(&stm_gpioa, 8, STM_AFR_AF0); stm_moder_set(&stm_gpioa, 8, STM_MODER_ALTERNATE); stm_ospeedr_set(&stm_gpioa, 8, STM_OSPEEDR_HIGH); + ao_enable_port(&stm_gpioc); stm_afr_set(&stm_gpioc, 9, STM_AFR_AF0); stm_moder_set(&stm_gpioc, 9, STM_MODER_ALTERNATE); stm_ospeedr_set(&stm_gpioc, 9, STM_OSPEEDR_HIGH); |