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authorKeith Packard <keithp@keithp.com>2018-09-11 00:08:17 -0700
committerKeith Packard <keithp@keithp.com>2018-10-13 08:22:50 -0700
commit621d1529d6bc07a3f4bd27fb2d02d5b3161a3a6a (patch)
treeda8e1826c9b15d29735620aacd8ba5a2cb4c83f8 /src/stm32f4-disco/ao_pins.h
parentb7a21bf6a086748b4907c0577eaa114445995783 (diff)
altos/stm32f4: Add STM32F413 disco board support
Discovery development board Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm32f4-disco/ao_pins.h')
-rw-r--r--src/stm32f4-disco/ao_pins.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/stm32f4-disco/ao_pins.h b/src/stm32f4-disco/ao_pins.h
new file mode 100644
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--- /dev/null
+++ b/src/stm32f4-disco/ao_pins.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright © 2018 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+#ifndef _AO_PINS_H_
+#define _AO_PINS_H_
+
+#define HAS_BEEP 0
+
+#define B_USER_PORT (&stm_gpioa)
+#define B_USER_PIN 0
+
+#define LED_GREEN_PORT (&stm_gpioc)
+#define LED_GREEN_PIN 5
+#define LED_RED_PORT (&stm_gpioe)
+#define LED_RED_PIN 3
+
+#define AO_HSE 8000000 /* fed from st/link processor */
+#define AO_HSE_BYPASS 1 /* no xtal, directly fed */
+
+#define AO_PLL_M 8 /* down to 1MHz */
+
+#define AO_PLL1_N 192 /* up to 192MHz */
+#define AO_PLL1_P 2 /* down to 96MHz */
+#define AO_PLL1_Q 4 /* down to 48MHz for USB and SDIO */
+
+#define AO_AHB_PRESCALER 1
+#define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
+
+#define AO_APB1_PRESCALER 1
+#define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE1_DIV_1
+#define AO_APB2_PRESCALER 1
+#define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_1
+
+#endif /* _AO_PINS_H_ */