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authorKeith Packard <keithp@keithp.com>2015-12-25 23:20:29 -0800
committerKeith Packard <keithp@keithp.com>2015-12-25 23:20:29 -0800
commit742f7c834bb5d651d2bebf2069d4e8facc33390d (patch)
tree3e788eb5b228717467a802a882a1d348a7b0acc1 /src/stm/stm32l.h
parent8aa0ab9fe9ca41f6d520d388973164bc0c599a06 (diff)
altos: Get stm32l pwm driver working
Fix the CCMR1_OC1PE and CCMR2_OC3PE values. Disable clock when no PWM outputs are running. Fix the apb1enr value for the timer. Set ARR value to PWM_MAX - 1 -- ARR is off by one. Sets the GPIO pins to 40MHz bandwidth for sharper edges. Tested on EasyMega, but that code is not included as it breaks the companion protocol. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm/stm32l.h')
-rw-r--r--src/stm/stm32l.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 799cccbd..01afedc6 100644
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -1775,7 +1775,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
#define STM_TIM234_CCMR1_OC1M_PWM_MODE_1 6
#define STM_TIM234_CCMR1_OC1M_PWM_MODE_2 7
#define STM_TIM234_CCMR1_OC1M_MASK 7
-#define STM_TIM234_CCMR1_OC1PE 11
+#define STM_TIM234_CCMR1_OC1PE 3
#define STM_TIM234_CCMR1_OC1FE 2
#define STM_TIM234_CCMR1_CC1S 0
#define STM_TIM234_CCMR1_CC1S_OUTPUT 0
@@ -1815,7 +1815,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
#define STM_TIM234_CCMR2_OC3M_PWM_MODE_1 6
#define STM_TIM234_CCMR2_OC3M_PWM_MODE_2 7
#define STM_TIM234_CCMR2_OC3M_MASK 7
-#define STM_TIM234_CCMR2_OC3PE 11
+#define STM_TIM234_CCMR2_OC3PE 3
#define STM_TIM234_CCMR2_OC3FE 2
#define STM_TIM234_CCMR2_CC3S 0
#define STM_TIM234_CCMR2_CC3S_OUTPUT 0