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authorKeith Packard <keithp@keithp.com>2016-11-20 20:54:10 -0800
committerKeith Packard <keithp@keithp.com>2017-02-20 12:31:16 -0800
commit088ddbb177efc8be2fc467524dc1668553080d3b (patch)
tree277f486b5204bfe087b79af66dfcc646fba4ed68 /src/stm/ao_timer.c
parent992eee8e0b4c6c774f3355af107fb422019ff4e5 (diff)
altos/stm: Interrupt priority is in the upper bits of the priority mask
Because the STM32L only offers 16 priority levels, the bottom four bits of each priority mask are not used. All of the interrupt priority settings in the system were using values < 16, making them all effectively the same. Fix that by moving them into the upper 4 bits and using symbolic constants everywhere. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm/ao_timer.c')
-rw-r--r--src/stm/ao_timer.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/stm/ao_timer.c b/src/stm/ao_timer.c
index f86a5116..1576a6c9 100644
--- a/src/stm/ao_timer.c
+++ b/src/stm/ao_timer.c
@@ -90,6 +90,7 @@ ao_timer_init(void)
stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) |
(1 << STM_SYSTICK_CSR_TICKINT) |
(STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE));
+ stm_nvic.shpr15_12 |= AO_STM_NVIC_CLOCK_PRIORITY << 24;
}
#endif