diff options
| author | Keith Packard <keithp@keithp.com> | 2012-04-09 23:27:43 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2012-04-14 13:21:09 -0700 |
| commit | 0dd9e1dd62656a931f9559af6da9131f704f83f9 (patch) | |
| tree | f0c659cda9e107b8a835c0f815d4153e4da09c8e /src/stm/ao_arch_funcs.h | |
| parent | 35e3c47da895bdd868b9b66b98bca64bd82db862 (diff) | |
altos: Add support for multiple SPI busses and sharing device drivers
The STM32L151 has several SPI busses, and we want to use more than
one, so add a 'bus' parameter to the SPI interfaces. To avoid wasting
time on AVR and CC1111 processors which only use one SPI bus, elide
those parameters from the actual functions by wrapping them with
macros.
Configuring chip select is now all macroized so that each chip can
have its own version, allowing the STM to share the various SPI device
drivers with the cc1111 and avr processors. Note that only the M25
driver has been ported; porting the others is 'trivial', but not
necessary at this point.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm/ao_arch_funcs.h')
| -rw-r--r-- | src/stm/ao_arch_funcs.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h index 052abb65..309937d5 100644 --- a/src/stm/ao_arch_funcs.h +++ b/src/stm/ao_arch_funcs.h @@ -37,6 +37,55 @@ ao_spi_recv(void *block, uint16_t len, uint8_t spi_index); void ao_spi_init(void); +#define ao_spi_get_mask(reg,mask,bus) do { \ + ao_spi_get(bus); \ + (reg).bsrr = ((uint32_t) mask) << 16; \ + } while (0) + +#define ao_spi_put_mask(reg,mask,bus) do { \ + (reg).bsrr = mask; \ + ao_spi_put(bus); \ + } while (0) + +#define ao_stm_enable_port(port) do { \ + if (&(port) == &stm_gpioa) \ + stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN); \ + else if (&(port) == &stm_gpiob) \ + stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN); \ + else if (&(port) == &stm_gpioc) \ + stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN); \ + else if (&(port) == &stm_gpiod) \ + stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN); \ + else if (&(port) == &stm_gpioe) \ + stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \ + } while (0) + + +#define ao_stm_enable_cs(port,bit) do { \ + stm_gpio_set(&(port), bit, 1); \ + stm_moder_set(&(port), bit, STM_MODER_OUTPUT); \ + } while (0) + +#define ao_spi_init_cs(port, mask) do { \ + ao_stm_enable_port(port); \ + if (mask & 0x0001) ao_stm_enable_cs(port, 0); \ + if (mask & 0x0002) ao_stm_enable_cs(port, 1); \ + if (mask & 0x0004) ao_stm_enable_cs(port, 2); \ + if (mask & 0x0008) ao_stm_enable_cs(port, 3); \ + if (mask & 0x0010) ao_stm_enable_cs(port, 4); \ + if (mask & 0x0020) ao_stm_enable_cs(port, 5); \ + if (mask & 0x0040) ao_stm_enable_cs(port, 6); \ + if (mask & 0x0080) ao_stm_enable_cs(port, 7); \ + if (mask & 0x0100) ao_stm_enable_cs(port, 8); \ + if (mask & 0x0200) ao_stm_enable_cs(port, 9); \ + if (mask & 0x0400) ao_stm_enable_cs(port, 10); \ + if (mask & 0x0800) ao_stm_enable_cs(port, 11); \ + if (mask & 0x1000) ao_stm_enable_cs(port, 12); \ + if (mask & 0x2000) ao_stm_enable_cs(port, 13); \ + if (mask & 0x4000) ao_stm_enable_cs(port, 14); \ + if (mask & 0x8000) ao_stm_enable_cs(port, 15); \ + } while (0) + /* ao_dma_stm.c */ |