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authorKeith Packard <keithp@keithp.com>2012-04-09 22:17:33 -0700
committerKeith Packard <keithp@keithp.com>2012-04-09 22:17:33 -0700
commit51aef5d4fc29986353ad887f4a67ed2fe35f8c8e (patch)
tree537602d5a0ed6fdae7e4ce8830f3c24a4a87aca5 /src/stm/ao_arch.h
parent1dcfbb05531767e67df45c2799a2fe533834fb71 (diff)
altos: Make STM clock configuration per-product. Fix 32MHz CPU speed
This moves all of the STM clock configuration into ao_pins.h so that each product can configure it separately. While doing this, I discovered that the flash memory mode (64-bit, prefetch, latency 1) wasn't actually getting set, which is why the CPU refused to work at 32MHz. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/stm/ao_arch.h')
-rw-r--r--src/stm/ao_arch.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/src/stm/ao_arch.h b/src/stm/ao_arch.h
index ce3a22e2..dd9579f1 100644
--- a/src/stm/ao_arch.h
+++ b/src/stm/ao_arch.h
@@ -148,7 +148,30 @@ extern const uint16_t ao_serial_number;
/*
* For now, we're running at a weird frequency
*/
-#define STM_APB1 (16000000 * 6 / 4)
+
+#if AO_HSE
+#define AO_PLLSRC AO_HSE
+#else
+#define AO_PLLSRC STM_HSI_FREQ
+#endif
+
+#define AO_PLLVCO (AO_PLLSRC * AO_PLLMUL)
+#define AO_SYSCLK (AO_PLLVCO / AO_PLLDIV)
+#define AO_HCLK (AO_SYSCLK / AO_AHB_PRESCALER)
+#define AO_PCLK1 (AO_HCLK / AO_APB1_PRESCALER)
+#define AO_PCLK2 (AO_HCLK / AO_APB2_PRESCALER)
+
+#if AO_APB1_PRESCALER == 1
+#define AO_TIM23467_CLK AO_PCLK1
+#else
+#define AO_TIM23467_CLK (2 * AO_PCLK1)
+#endif
+
+#if AO_APB2_PRESCALER == 1
+#define AO_TIM91011_CLK AO_PCLK2
+#else
+#define AO_TIM91011_CLK (2 * AO_PCLK2)
+#endif
void ao_lcd_stm_init(void);