diff options
| author | Keith Packard <keithp@keithp.com> | 2012-04-09 23:27:43 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2012-04-14 13:21:09 -0700 |
| commit | 0dd9e1dd62656a931f9559af6da9131f704f83f9 (patch) | |
| tree | f0c659cda9e107b8a835c0f815d4153e4da09c8e /src/cc1111/ao_pins.h | |
| parent | 35e3c47da895bdd868b9b66b98bca64bd82db862 (diff) | |
altos: Add support for multiple SPI busses and sharing device drivers
The STM32L151 has several SPI busses, and we want to use more than
one, so add a 'bus' parameter to the SPI interfaces. To avoid wasting
time on AVR and CC1111 processors which only use one SPI bus, elide
those parameters from the actual functions by wrapping them with
macros.
Configuring chip select is now all macroized so that each chip can
have its own version, allowing the STM to share the various SPI device
drivers with the cc1111 and avr processors. Note that only the M25
driver has been ported; porting the others is 'trivial', but not
necessary at this point.
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/cc1111/ao_pins.h')
| -rw-r--r-- | src/cc1111/ao_pins.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/cc1111/ao_pins.h b/src/cc1111/ao_pins.h index a18c74c8..5c0cb7df 100644 --- a/src/cc1111/ao_pins.h +++ b/src/cc1111/ao_pins.h @@ -82,7 +82,7 @@ #define HAS_ACCEL_REF 1 #define SPI_CS_ON_P1 1 #define SPI_CS_ON_P0 0 - #define M25_CS_MASK 0x02 /* CS0 is P1_1 */ + #define AO_M25_SPI_CS_MASK 0x02 /* CS0 is P1_1 */ #define M25_MAX_CHIPS 1 #define HAS_ACCEL 1 #define HAS_IGNITE 1 @@ -119,7 +119,7 @@ #define HAS_ACCEL_REF 1 #define SPI_CS_ON_P1 1 #define SPI_CS_ON_P0 0 - #define M25_CS_MASK 0x02 /* CS0 is P1_1 */ + #define AO_M25_SPI_CS_MASK 0x02 /* CS0 is P1_1 */ #define M25_MAX_CHIPS 1 #define HAS_ACCEL 1 #define HAS_IGNITE 1 @@ -358,7 +358,7 @@ #define LEDS_AVAILABLE (AO_LED_RED|AO_LED_GREEN) #define SPI_CS_ON_P1 1 #define SPI_CS_ON_P0 0 - #define M25_CS_MASK 0x04 /* CS0 is P1_2 */ + #define AO_M25_SPI_CS_MASK 0x04 /* CS0 is P1_2 */ #define M25_MAX_CHIPS 1 #define HAS_ACCEL 0 #define HAS_IGNITE 0 @@ -458,6 +458,8 @@ #define SPI_CS_DIR P0DIR #endif +#define AO_M25_SPI_CS_PORT SPI_CS_PORT + #ifndef IGNITE_ON_P2 #error Please define IGNITE_ON_P2 #endif |