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authorKeith Packard <keithp@keithp.com>2011-10-11 18:10:45 -0600
committerKeith Packard <keithp@keithp.com>2011-10-11 18:57:32 -0600
commit3a28846d3ff8f82b0e97c211b9debf6d67ee5af5 (patch)
tree58c5afcde285cc2b140e0fe541dfe081e9e2b8cd /src/avr
parente60c470b426b7be08a33133e7d8c94201d7e96d4 (diff)
altos/avr: Clear SPI receive buffer before clocking new data in
I don't know why this is necessary, but the receive buffer gets 'extra' data added somehow. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/avr')
-rw-r--r--src/avr/ao_spi_usart.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/avr/ao_spi_usart.c b/src/avr/ao_spi_usart.c
index 1996fcd9..5ea11da6 100644
--- a/src/avr/ao_spi_usart.c
+++ b/src/avr/ao_spi_usart.c
@@ -43,15 +43,17 @@ ao_spi_send(void __xdata *block, uint16_t len) __reentrant
/* Receive bytes over SPI.
*
- * This sets up tow DMA engines, one reading the data and another
- * writing constant values to the SPI transmitter as that is what
- * clocks the data coming in.
+ * Poll, sending zeros and reading data back
*/
void
ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
{
uint8_t *d = block;
+ /* Clear any pending data */
+ while (UCSR1A & (1 << RXC1))
+ (void) UDR1;
+
while (len--) {
while (!(UCSR1A & (1 << UDRE1)));
UDR1 = 0;