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authorKeith Packard <keithp@keithp.com>2012-04-07 18:54:32 -0700
committerKeith Packard <keithp@keithp.com>2012-04-07 18:54:32 -0700
commitb5e9d14b4e3e8f29ad8a7bb9b339890be4bcfa2f (patch)
tree768215e0aed17f7d7cce111c82d5c750e22a24bc
parent5e41d1e03680af9806c599aad80b9b64dd719f9b (diff)
altos: STM SPI is not using interrupts itself
All SPI transfers are done via DMA, so the DMA interrupts suffice. Signed-off-by: Keith Packard <keithp@keithp.com>
-rw-r--r--src/stm/ao_spi_stm.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/stm/ao_spi_stm.c b/src/stm/ao_spi_stm.c
index 92747d87..ecf7934f 100644
--- a/src/stm/ao_spi_stm.c
+++ b/src/stm/ao_spi_stm.c
@@ -229,9 +229,6 @@ ao_spi_init(void)
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN);
ao_spi_channel_init(0);
-
- stm_nvic_set_enable(STM_ISR_SPI1_POS);
- stm_nvic_set_priority(STM_ISR_SPI1_POS, 3);
#endif
#if HAS_SPI_2
@@ -254,8 +251,5 @@ ao_spi_init(void)
stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_SPI2EN);
ao_spi_channel_init(1);
-
- stm_nvic_set_enable(STM_ISR_SPI2_POS);
- stm_nvic_set_priority(STM_ISR_SPI2_POS, 3);
#endif
}