diff options
| author | Keith Packard <keithp@keithp.com> | 2017-04-30 17:38:21 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2017-04-30 17:38:21 -0700 |
| commit | 979a1b8d80189e56745316da3de9288ee32e102c (patch) | |
| tree | dd760ecfce0ddb2cbe199e71acc1fd5f6b358161 | |
| parent | 671e00f9fa75d75b5f15d8cc558a46a9651690fa (diff) | |
altos/telegps-v2.0: Set CPU clock to 48MHz instread of 96MHz
Turns out the CPU doesn't run well at that speed. Who would have guessed?
Signed-off-by: Keith Packard <keithp@keithp.com>
| -rw-r--r-- | src/telegps-v2.0/ao_pins.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/telegps-v2.0/ao_pins.h b/src/telegps-v2.0/ao_pins.h index beef86c7..37a5fa39 100644 --- a/src/telegps-v2.0/ao_pins.h +++ b/src/telegps-v2.0/ao_pins.h @@ -35,8 +35,9 @@ #define AO_HSE 32000000 #define AO_RCC_CFGR_PLLMUL STM_RCC_CFGR_PLLMUL_3 +#define AO_RCC_CFGR2_PLLDIV STM_RCC_CFGR2_PREDIV_2 #define AO_PLLMUL 3 -#define AO_PLLDIV 1 +#define AO_PLLDIV 2 /* HCLK = 48MHz */ #define AO_AHB_PRESCALER 1 @@ -46,8 +47,6 @@ #define AO_APB_PRESCALER 1 #define AO_RCC_CFGR_PPRE_DIV STM_RCC_CFGR_PPRE_DIV_1 -#define AO_RCC_CFGR2_PLLDIV STM_RCC_CFGR2_PREDIV_1 - #define HAS_USB 1 #define AO_USB_DIRECTIO 0 #define AO_PA11_PA12_RMP 1 |