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authorKeith Packard <keithp@keithp.com>2012-09-01 00:14:49 -0500
committerKeith Packard <keithp@keithp.com>2012-09-01 00:14:49 -0500
commit8c743857525eff778d067068356dec486b9fefa2 (patch)
tree4d12f144b1e09f8f5d0eeb7c4ef3ecff74b7474e
parent294b1ec85a37e375a0ac70cbffc6398309d63a7f (diff)
Revert "ICP3 working"
PWM bits not suitable for master This reverts commit 75d6aa6f798606f1a6c5a46542065dda81e63b2a.
-rw-r--r--src/avr/ao_pwmin.c27
1 files changed, 17 insertions, 10 deletions
diff --git a/src/avr/ao_pwmin.c b/src/avr/ao_pwmin.c
index 73a153b2..edcb1636 100644
--- a/src/avr/ao_pwmin.c
+++ b/src/avr/ao_pwmin.c
@@ -25,20 +25,27 @@
* project payload developed at Challenger Middle School.
*/
-volatile __data uint16_t ao_icp3_count;
+volatile __data uint16_t ao_tick3_count;
static void
ao_pwmin_display(void) __reentrant
{
- /* display the most recent value */
- printf("icp 3: %5u\n", ao_icp3_count);
+ uint8_t lo = TCNT1L;
+ uint8_t hi = TCNT1H;
+ uint16_t value = (hi <<8) | lo;
+
+ uint8_t lo3 = TCNT3L;
+ uint8_t hi3 = TCNT3H;
+ uint16_t value3 = (hi3 <<8) | lo3;
+
+ /* now display the value we read */
+ printf("timer 1: %5u %2x %2x\n", value, hi, lo);
+ printf("timer 3: %5u %2x %2x\n", value3, hi3, lo3);
}
-ISR(TIMER3_CAPT_vect)
+ISR(TIMER3_COMPA_vect)
{
- uint8_t lo = ICR3L;
- uint8_t hi = ICR3H;
- ao_icp3_count = (hi <<8) | lo;
+ ++ao_tick3_count;
}
__code struct ao_cmds ao_pwmin_cmds[] = {
@@ -52,15 +59,15 @@ ao_pwmin_init(void)
/* do hardware setup here */
TCCR3A = ((0 << WGM31) | /* normal mode, OCR3A */
(0 << WGM30)); /* normal mode, OCR3A */
- TCCR3B = ((1 << ICNC3) | /* input capture noise canceler on */
+ TCCR3B = ((0 << ICNC3) | /* no input capture noise canceler */
(0 << ICES3) | /* input capture on falling edge (don't care) */
(0 << WGM33) | /* normal mode, OCR3A */
(0 << WGM32) | /* normal mode, OCR3A */
(4 << CS30)); /* clk/256 from prescaler */
-
+ OCR3A = 1250; /* 8MHz clock */
- TIMSK3 = (1 << ICIE3); /* Interrupt on input compare */
+ TIMSK3 = (1 << OCIE3A); /* Interrupt on compare match */
/* set the spike filter bit in the TCCR3B register */