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<title>mjb/altos/src/stmf0/stm32f0.h, branch pong</title>
<subtitle>AltOS - the operating system for Altus Metrum products
</subtitle>
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<updated>2017-04-28T07:04:33+00:00</updated>
<entry>
<title>altos/stmf0: Fix HSI clock rate.</title>
<updated>2017-04-28T07:04:33+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2017-04-28T07:04:33+00:00</published>
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<id>urn:sha1:d197adf353ec5503c72a4554aca2a463bb685932</id>
<content type='text'>
It's 8MHz, not 16MHz

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Support timer 2/3 for the beeper</title>
<updated>2017-02-21T01:35:51+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2017-02-21T01:29:15+00:00</published>
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<id>urn:sha1:9603d737e9ea58217ff2c2dd7c350c7a29fba980</id>
<content type='text'>
Tested on timer 2, all four channels.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/arm: Align data so that gcc 5.4 doesn't do byte-accesses. Add -Wcast-align</title>
<updated>2016-12-18T05:04:33+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-12-18T04:58:36+00:00</published>
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<id>urn:sha1:89ecc32b90565ace078c4a84d4406a4d1f86821a</id>
<content type='text'>
Gcc 5.4.1 tracks alignment of data through assignments, so that a
uint32_t pointer which comes from byte-aligned uint8_t data:

extern uint8_t foo[];

	uint32_t	*q = (void *) foo;

Fetches and stores through this pointer are done bytewise. This is
slow (meh), but if q references a device register, things to bad very
quickly.

This patch works around this bug in the compiler by adding
__attribute__((aligned(4))) tags to some variables, or changing them
from uint8_t to uint32_t. Places doing this will now be caught as I've
added -Wcast-align to the compiler flags. That required adding (void
*) casts, after the relevant code was checked to make sure the
compiler could tell that the addresses were aligned.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Add USART support</title>
<updated>2016-10-31T02:07:39+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-10-31T02:06:20+00:00</published>
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<id>urn:sha1:148f6e0a107d9e88509958700351794f2f971312</id>
<content type='text'>
The STM32F0 usart can be operated much like the STM32L usart, but the
registers are all moved around.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Hook up clock output support</title>
<updated>2016-08-02T23:55:11+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-08-02T23:32:43+00:00</published>
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<id>urn:sha1:782013d0ff2c9f076952c0e172bfcb7016699d5f</id>
<content type='text'>
This was used to try and not have two xtals on telemini, but failed
because the provided clock has too much noise.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Add STM32F0 beep and SPI byte API.</title>
<updated>2016-07-14T22:12:58+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-07-02T18:00:01+00:00</published>
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<id>urn:sha1:1667cb8e8b702b05fc3ec39ee49029885df64a4a</id>
<content type='text'>
Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>Switch from GPLv2 to GPLv2+</title>
<updated>2016-07-12T22:41:41+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-07-05T16:03:49+00:00</published>
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<id>urn:sha1:1085ec5d57e0ed5d132f2bbdac1a0b6a32c0ab4a</id>
<content type='text'>
Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Fix external interrupts</title>
<updated>2016-04-20T03:21:30+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-04-13T13:11:44+00:00</published>
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<id>urn:sha1:3abc0fc5e4484d862709501133d35563aa0c25fa</id>
<content type='text'>
Missing a reserved address in the registers broke everything nicely,
but the priority values were also wrong - stm32f0 exposes 8 bits per
priority, like the stm32l, but it uses only the top two bits.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Support HPE clock source</title>
<updated>2016-04-03T02:45:06+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-04-03T02:43:32+00:00</published>
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<id>urn:sha1:f95c781bc16d332ea5442590521074396d6981ae</id>
<content type='text'>
Allows the use of crystals instead of requiring USB.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos/stmf0: Add SPI driver.</title>
<updated>2016-04-03T02:45:06+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2016-04-03T02:42:44+00:00</published>
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<id>urn:sha1:9f9d77b6d025d8285e362e53a8f728ec47adb234</id>
<content type='text'>
This also changes the DMA interface a bit so we can select for
interrupts on only the interesting channels.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
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