<feed xmlns='http://www.w3.org/2005/Atom'>
<title>mjb/altos/src/stm/stm32l.h, branch droid-gps</title>
<subtitle>AltOS - the operating system for Altus Metrum products
</subtitle>
<id>https://git.ethernal.org/mjb/altos/atom?h=droid-gps</id>
<link rel='self' href='https://git.ethernal.org/mjb/altos/atom?h=droid-gps'/>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/'/>
<updated>2013-02-24T08:19:49+00:00</updated>
<entry>
<title>altos/stm: Add more bits to NVIC register definitions</title>
<updated>2013-02-24T08:19:49+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2013-02-24T08:19:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=25435dcbc6416935aa432fc090ea977bfff5d153'/>
<id>urn:sha1:25435dcbc6416935aa432fc090ea977bfff5d153</id>
<content type='text'>
This cleans up a few values, adds more comments and a few more NVIC fields.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Clean up stm arch macros a bit.</title>
<updated>2012-10-25T20:38:13+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-10-25T20:38:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=9b978cd467f9128f3069765dd8fbf8abad3459a4'/>
<id>urn:sha1:9b978cd467f9128f3069765dd8fbf8abad3459a4</id>
<content type='text'>
Turn a bunch of the macros into inline functions.
Clean up the reboot method to use the stm_scb structure.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Add stack-guard code. Uses STM MPU to trap stack overflow.</title>
<updated>2012-10-25T07:07:14+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-10-25T05:46:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=4b13d3c659240e5a8347b1ba7ab0bf1d8355eba3'/>
<id>urn:sha1:4b13d3c659240e5a8347b1ba7ab0bf1d8355eba3</id>
<content type='text'>
This marks the lowest portion of the stack as inaccessible to the CPU,
causing the processor to fault when it reaches it. The fault then
generates a panic message so that the user can know what happened.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: profiling on STM32L</title>
<updated>2012-10-25T07:07:14+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-10-24T05:17:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=b119e19604aa557a40e848c60d98a67b5f259bbd'/>
<id>urn:sha1:b119e19604aa557a40e848c60d98a67b5f259bbd</id>
<content type='text'>
Add sample-based profiling, using a 1kHz timer

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Enable STM SYSCFG when routing EXTI</title>
<updated>2012-08-29T06:00:22+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-08-28T05:45:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=68df2b1173e82d48f7857ad2e9325e6a9cbbedfd'/>
<id>urn:sha1:68df2b1173e82d48f7857ad2e9325e6a9cbbedfd</id>
<content type='text'>
The EXTI routing information is in the syscfg unit, so that needs to
be powered up or writes to its registers will be lost.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Add ao_gpio_get and ao_exti_set_mode</title>
<updated>2012-08-07T02:33:44+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-08-07T02:33:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=6171892fa32e8a662a494ec6ba28a82fddc68589'/>
<id>urn:sha1:6171892fa32e8a662a494ec6ba28a82fddc68589</id>
<content type='text'>
Needed to support general GPIO interrupts

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Add driver for STM internal flash</title>
<updated>2012-07-30T02:48:08+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-07-30T02:48:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=2e7e304e67bc1e094282c8668fa8cccf09f9c9b4'/>
<id>urn:sha1:2e7e304e67bc1e094282c8668fa8cccf09f9c9b4</id>
<content type='text'>
Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Wait for i2c START condition before setting interrupt bits</title>
<updated>2012-06-27T09:46:27+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-06-27T09:46:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=1a1d4a557a30e2e743936b828b654187ec562ca8'/>
<id>urn:sha1:1a1d4a557a30e2e743936b828b654187ec562ca8</id>
<content type='text'>
This seems better than the random loop that it replaces, but I still
have no idea why this is required; it doesn't coorespond to the docs
at all...

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Create a 32-bit 1MHz timer for use in profiling execution</title>
<updated>2012-06-27T06:18:44+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-06-27T06:18:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=fb2b83fcd28199d8c686e676d46d6ecfbf706f37'/>
<id>urn:sha1:fb2b83fcd28199d8c686e676d46d6ecfbf706f37</id>
<content type='text'>
This provides a simple method for getting high-resolution timer data
to use in performance tuning code. It's not used by default anywhere.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>altos: Route correct GPIO line to interrupt controller</title>
<updated>2012-06-02T23:53:46+00:00</updated>
<author>
<name>Keith Packard</name>
<email>keithp@keithp.com</email>
</author>
<published>2012-06-02T23:53:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.ethernal.org/mjb/altos/commit/?id=8d425ffba84ec6f632e8c0d44105de73242a86a9'/>
<id>urn:sha1:8d425ffba84ec6f632e8c0d44105de73242a86a9</id>
<content type='text'>
Which GPIO a particular pin interrupt comes from is selected by the
SYSCFG EXTICR registers; set these when an exti interrupt is configured.

Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
</feed>
