mjb/altos/src/stm/stm32l.h, branch companion-delay AltOS - the operating system for Altus Metrum products https://git.ethernal.org/mjb/altos/atom?h=companion-delay 2012-08-29T06:00:22+00:00 altos: Enable STM SYSCFG when routing EXTI 2012-08-29T06:00:22+00:00 Keith Packard keithp@keithp.com 2012-08-28T05:45:47+00:00 urn:sha1:68df2b1173e82d48f7857ad2e9325e6a9cbbedfd The EXTI routing information is in the syscfg unit, so that needs to be powered up or writes to its registers will be lost. Signed-off-by: Keith Packard <keithp@keithp.com> altos: Add ao_gpio_get and ao_exti_set_mode 2012-08-07T02:33:44+00:00 Keith Packard keithp@keithp.com 2012-08-07T02:33:44+00:00 urn:sha1:6171892fa32e8a662a494ec6ba28a82fddc68589 Needed to support general GPIO interrupts Signed-off-by: Keith Packard <keithp@keithp.com> altos: Add driver for STM internal flash 2012-07-30T02:48:08+00:00 Keith Packard keithp@keithp.com 2012-07-30T02:48:08+00:00 urn:sha1:2e7e304e67bc1e094282c8668fa8cccf09f9c9b4 Signed-off-by: Keith Packard <keithp@keithp.com> altos: Wait for i2c START condition before setting interrupt bits 2012-06-27T09:46:27+00:00 Keith Packard keithp@keithp.com 2012-06-27T09:46:27+00:00 urn:sha1:1a1d4a557a30e2e743936b828b654187ec562ca8 This seems better than the random loop that it replaces, but I still have no idea why this is required; it doesn't coorespond to the docs at all... Signed-off-by: Keith Packard <keithp@keithp.com> altos: Create a 32-bit 1MHz timer for use in profiling execution 2012-06-27T06:18:44+00:00 Keith Packard keithp@keithp.com 2012-06-27T06:18:44+00:00 urn:sha1:fb2b83fcd28199d8c686e676d46d6ecfbf706f37 This provides a simple method for getting high-resolution timer data to use in performance tuning code. It's not used by default anywhere. Signed-off-by: Keith Packard <keithp@keithp.com> altos: Route correct GPIO line to interrupt controller 2012-06-02T23:53:46+00:00 Keith Packard keithp@keithp.com 2012-06-02T23:53:46+00:00 urn:sha1:8d425ffba84ec6f632e8c0d44105de73242a86a9 Which GPIO a particular pin interrupt comes from is selected by the SYSCFG EXTICR registers; set these when an exti interrupt is configured. Signed-off-by: Keith Packard <keithp@keithp.com> altos: Oopsed the STM DMA channels for I2C1 2012-04-26T06:25:43+00:00 Keith Packard keithp@keithp.com 2012-04-26T06:25:43+00:00 urn:sha1:962476911aaab17fd482593a0e8b95fe47de2f29 TX is 6, RX is 7 Signed-off-by: Keith Packard <keithp@keithp.com> altos: Starting to write cc1120 driver 2012-04-17T18:01:18+00:00 Keith Packard keithp@keithp.com 2012-04-17T18:01:18+00:00 urn:sha1:1489263b895a2a825e29d0560c9b1dbba8a3f431 This does "something" in radio test mode, appearing to generate a 730MHz signal. Signed-off-by: Keith Packard <keithp@keithp.com> altos: Add register definitions for STM syscfg and usb 2012-04-14T20:22:02+00:00 Keith Packard keithp@keithp.com 2012-04-12T06:25:36+00:00 urn:sha1:150881f86f8d90b5867507889441990d18223e62 Signed-off-by: Keith Packard <keithp@keithp.com> altos: Make STM clock configuration per-product. Fix 32MHz CPU speed 2012-04-10T05:17:33+00:00 Keith Packard keithp@keithp.com 2012-04-10T05:17:33+00:00 urn:sha1:51aef5d4fc29986353ad887f4a67ed2fe35f8c8e This moves all of the STM clock configuration into ao_pins.h so that each product can configure it separately. While doing this, I discovered that the flash memory mode (64-bit, prefetch, latency 1) wasn't actually getting set, which is why the CPU refused to work at 32MHz. Signed-off-by: Keith Packard <keithp@keithp.com>